Introduction
With the developments of optical signal processing and inter-/intra-chip optical interconnections, waveguide-based photonic devices are of great importance for high compact nanophotonic integrated chips. However, the mode sizes of conventional dielectric waveguides cannot be smaller than half of the wavelength due to the diffraction limit. In order to improve the integration density by breaking the diffraction limit, surface plasmon polaritons (SPPs) have been recently exploited to implement various integrated plasmonic devices. For SPPs, due to the coupling of the electromagnetic wave and electron gas, the electromagnetic wave is localized at the interface between metal and dielectric, confining the mode into subwavelength region. SPPs have been characterized by extremely short wavelengths, high optical field enhancement at the interface, and strong optical confinement down to deep subwavelength dimensions [1,2]. There are various types of SPP-based plasmonic waveguides, including groove waveguides, metal-insulator-metal (MIM) waveguides, insulator-metal-insulator (IMI) waveguides, dielectric-loaded waveguides, etc [3]. However, to the best of our knowledge, most of the plasmonic waveguides demonstrated in previous study were passive, and their propagation constants were fixed and cannot be tuned, which greatly limited their functionalities [1–3].
Here we present novel phase modulators based on plasmonic waveguides consisting of metal-dielectric-silicon (Si) stacks to confine the optical energy in the nanometer-size oxide layer. The plasmonic waveguide mode effective refractive index can be tuned by an external voltage, using free carrier plasma dispersion effect in Si [4] or high electro-optic effect in polymer material. The proposed plasmonic modulator is naturally connected with a Si ridge waveguide, making it compatible with Si photonic devices.
Plasmonic waveguide structure
Figure 1(a) shows the schematic of the proposed plasmonic waveguide comprising the plasmonic hybrid waveguide, waveguide taper, silicon access waveguide, and finger-shaped connection bridges. Figure 1(b) shows the cross section of the plasmonic waveguide comprising silicon (Si), silicon dioxide (SiO2) and sliver (Ag) layers. The oxide layer at the top of the plasmonic waveguide structure is made thicker to reduce the absorption loss of the top Ag metal. The geometric parameters studied in this paper are showed in Fig. 1(b), with WSi, , and WAg representing the widths of the Si, SiO2 and Ag layers, respectively. The permittivity/refractive indices of those layers at 1550 nm are ϵAg = -133.75+3.337i, , and nSi = 3.48, respectively [5]. Because the silicon waveguide core is wrapped around by the oxide layer, a finger-shaped access bridge is used to connect the silicon core out to an electrode [6].
To actively tune the plasmonic mode, one approach is to use free carrier plasma dispersion effect in silicon to change the effective refractive index. Once an external voltage is applied onto the capacitor, free carriers are accumulated or depleted near the thin oxide layer. Figure 2(a) shows simulated electric field distribution for a transverse electric (TE) polarization mode with . For dielectric waveguides, light is strongly confined in high index dielectric layers due to total internal reflection. However, the proposed plasmonic waveguide with the TE mode has a strong optical confinement in both sides of the low index dielectric layer. The field in oxide nano-layer is greatly enhanced due to the SPP at the Ag-SiO2 interface and electric field discontinuity at the Si-SiO2 interface. As the thickness of sidewall oxide layer plays an important role in the plasmonic mode profile and propagation, we calculate the plasmonic mode complex effective index neff = nre + inim for various oxide widths using finite element method. Other parameters are WSi = 100 nm, WAg = 10 nm, and the oxide cap height is 150 nm. The real part nre is associated with the plasmonic wave propagation and the imaginary part nim is related to the propagation loss, which is given by 20lg(e)k0nim, where k0 is the free space wave number. Figure 2(b) shows the simulated nre and the change of propagation loss with . When is zero, traditional SPPs are generated at the interfaces between the silver and silicon layers. When the thickness of oxide layer increases, the effective index (both real and imaginary parts) decreases because energy is distributed more in the oxide layer and less in the metal layer. Therefore, in order to efficiently change the plasmonic mode using free carrier effect in the silicon core, a thin oxide layer should be used.
As shown in Fig. 1(a), the plasmonic waveguide is connected to a silicon ridge waveguide by two adiabatic tapers, which are covered with silver as well. Optical energy is well confined in the silicon core for the silicon ridge waveguide. When it tapers down, optical energy is gradually squeezed into the sidewall oxide layer. Adiabatic tapers require a long tapering length to minimize the mode transform loss. However, a longer tapering length also means a higher loss due to the existence of silver layer in the taper sections. Thus, there is an optimum taper length for which the coupling efficiency reaches the maximum. Figure 2(c) presents the 3D simulated coupling efficiency change as a function of taper length. At a taper length of 510 nm, the highest coupling efficiency of about 88% is obtained. Figure 2(d) illustrates the top-view electric-field propagation pattern in the whole waveguide. A smooth mode transforming from the silicon dielectric waveguide to the plasmonic waveguide is clearly observed with low back-reflection and diffraction in the taper sections.
Fig.2 (a) Simulated electric-field mode pattern of plasmonic waveguide; (b) effective refractive index and propagation loss vs. sidewall oxide width; (c) coupling efficiency vs. taper length; (d) electric-field pattern showing the coupling from silicon waveguide to plasmonic waveguide. Waveguide parameters are set as WSi = 100 nm, hSi = 200 nm, , and WAg = 10 nm |
The responses of the plasmonic mode to an external voltage are also investigated. For the plasmonic mode, although most of the optical energy is localized in the thin oxide layer, there is still some remaining in the silicon core. When free carriers are injected into or extracted from the silicon core, the refractive index of silicon will be changed and thus the plasmonic mode will suffer a small variation accordingly. According to the sign and magnitude of drive voltage, three working regimes can be distinguished – accumulation regime, depletion regime, and inversion regime. Figures 3(a)-3(c) schematically show the free carrier dynamics in the silicon core for these three regimes. In response to a positive voltage, free electrons accumulate around the sidewall thin oxide layer (also under the cap oxide layer but much less) and the corresponding refractive index of silicon is reduced [4]. The thickness of electron accumulation layer is determined by the Debye length [7]. When a small negative voltage is applied, electrons near the oxide layer are pushed away and a depletion region forms; when the negative voltage is large, holes are then generated and accumulated near the oxide layer. The depletion and inversion layers can also change the refractive index of silicon. Figures 3(d) and 3(e) show the free carrier distribution along a lateral line for the carrier accumulation and inversion cases. The concentration of original silicon doping is set to be 5×1017 cm-3. Figure 3(f) shows nre changes with the applied voltage. It can be found that a positive voltage monolithically reduces nre, while a negative voltage first slightly increases and then decreases nre due to the competition between electron depletion and hole accumulation. At 5-V drive voltage, ∆nre = -0.0043, which implies a about 10° phase change for a 10-μm-long plasmonic waveguide with a loss of 7.2 dB. It should be noted that resonance structures, such as microring resonators, photonic crystal cavities etc., can be employed to enhance the transmission sensitivity to the small refractive index change [8].
The plasma dispersion effect is relatively weak, and hence the change of effective refractive index is very limited, resulting in a small phase modulation. Another approach that can be used to increase the modulation efficiency is to use a polymer layer to replace the oxide layer as shown in Fig. 1(c) [9]. Thus the hybrid plasmonic waveguide can fully utilize the high electro-optic effect of the polymer material to realize a fast-speed and low-power optical modulation. Once an external voltage is applied onto the capacitor, the refractive index of the poled polymer is changed accordingly due to its strong χ(2) nonlinear electro-optic effect, resulting in a significant change of effective index and hence a large phase shift after a certain propagation length. Nonlinear polymers typically have a very high resistivity of 1011 Ω·cm [10], and as a result, the silicon and metal layers are electrically isolated and can be used as the modulator electrodes. We consider the molecular glasses based on the reversible self-assembly of aromatic/perfluoroaromatic (Ar-ArF) dendron-substituted nonlinear optical (NLO) chromophores as the electro-optic polymer, which has a large electro-optic coefficient (r33>200 pm/V), a good alignment stability and a high-speed response to create a high-speed device with a low drive voltage [11]. The polymer refractive index change Δn to an external electric field E is given by [12]:where U is the voltage applied on the polymer layer.
The device geometric parameters can be chosen as WSi = 100 nm, Wpolymer = 20 nm, and WAg = 10 nm by taking into account both the fabrication feasibility and the modulation efficiency. Upon a 2.5-V voltage, the plasmonic waveguide experiences a large effective refractive index change, causing a π phase shift for a 13-μm-long device, as shown in Fig. 4. Given that the inherent response time of the polymer is in the order of femtoseconds [13], the capacitor charging and discharging time (RC time) is the limiting factor to the modulating speed of the device. Assuming the silicon core is doped with phosphorus (concentration 2×1020 cm-3), the resistivity of the phase modulator is estimated to be ρ= 4×10-4 Ωcm. The associated free carrier absorption loss is about 0.228 dB/μm, which is smaller than the plasmonic waveguide inherent loss of about 0.6 dB/μm. As shown in Fig. 1(a) (SiO2 is replaced by polymer), in our device the silicon core input and output ends are connected to one common electrode, which effectively reduces the resistance and helps to increase the modulation speed. The resistance and the capacitance are estimated to be 1.3 kΩ and 2.9 fF, respectively, and hence the RC time is approximately 3.77 ps, corresponding to a modulation bandwidth of about 100 GHz. At 2.5-V applied voltage, the power consumption which primarily comes from dynamically charging and discharging of the capacitor is about 0.9 mW (or equivalently 9 fJ/bit), assuming the modulation is at 100 GHz. The high performance of the modulator can satisfy the future requirements for fast modulation speed and low power consumption in optical telecommunication and interconnect applications.
Conclusions
Novel phase modulators based on plasmonic waveguides, consisting of Ag-dielectric-Si stacking layers, are proposed. The optical field is strongly confined in the nanometer thin layer for the TE polarization mode. With an injection/extraction of free carriers in the silicon layer or a high electro-optic effect of the polymer material upon an external voltage, the effective refractive indices of the plasmonic modes can be changed, which can be utilized to realize the plasmonic phase modulators. The proposed plasmonic waveguide-based phase modulators can serve as a basic building block for future hybrid integration of silicon photonic and plasmonic devices for optical signal processing and interconnection applications.