An adaptive ramp generator for ADC built-in self-test

Abstract

An adaptive ramp generator based on linear histogram was proposed for the built-in self-test (BIST) of analog to digital convertor (ADC) in CMOS image sensor. By comparing the generated ramp signal to a reference voltage and feeding back a calibration signal, the slope adjustment was implemented, and high linearity and precision of ramp slope were realized. By modulating the pulse width and reference voltage, sweep length varied from microsecond to second and signal swing could reach 3 V with 5.6 mW power consumption. The ramp was used as input to an ideal 10-bit single-slope ADC, and the corresponding DNL and INL were 0.032 LSB and 0.078 LSB, respectively.

Keywords

ramp generator / adaptive circuit / built-in self-test (BIST) / integrator

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