RESEARCH ARTICLE

Design and implementation of super-heterodyne nano-metrology circuits

  • Saeed OLYAEE ,
  • Zahra DASHTBAN ,
  • Muhammad Hussein DASHTBAN
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  • Nano-photonics and Optoelectronics Research Laboratory, Faculty of Electrical and Computer Engineering, Shahid Rajaee Teacher Training University, Lavizan, 16788-15811, Tehran, Iran

Received date: 27 Apr 2013

Accepted date: 26 Jun 2013

Published date: 05 Sep 2013

Copyright

2014 Higher Education Press and Springer-Verlag Berlin Heidelberg

Abstract

The most important aim of nanotechnology development is to construct atomic-scale devices, and those atomic-scale devices are required to use some measurements that have ability to control and build in the range of these dimensions. A method based on super-heterodyne interferometers can be used to access the measurements in nano-scale. One of the most important limitations to increase the resolution of the displacement measurement is nonlinearity error. According to the base and measurement signals received by optical section of super-heterodyne interferometer, it is necessary for circuits to reconstruct and detect corresponding phase with target displacement. In this paper, we designed, simulated, and implemented the circuits required for electronic part of interferometer by complementary metal-oxide-semiconductor (CMOS) 0.5 µm technology. These circuits included cascade low-noise amplifiers (LNA) with 19.1 dB gain and 2.5 dB noise figure (NF) at 500 MHz frequency, band-pass filters with 500 MHz central frequency and 400 kHz bandwidth, double-balanced mixers with 233/0.6 µm ratio for metal-oxide-semiconductor field-effect transistors (MOSFETs), and low-pass filters with 300 kHz cutoff frequency. The experimental results show that the amplifiers have 19.41 dB gain and 2.7 dB noise factor, mixers have the ratio of radio frequency to local oscillator (RF/LO) range between 80 and 2500 MHz with intermediate frequency (IF) range between DC to 1000 MHz, and the digital phase measurement circuit based on the time-to-digital converter (TDC) has a nanosecond resolution.

Cite this article

Saeed OLYAEE , Zahra DASHTBAN , Muhammad Hussein DASHTBAN . Design and implementation of super-heterodyne nano-metrology circuits[J]. Frontiers of Optoelectronics, 0 , 6(3) : 318 -326 . DOI: 10.1007/s12200-013-0337-7

Introduction

Nanotechnology has newly emerged in recent years [1-3]. Its name stems from the word “nanometer”, which means designing and processing of objects are in the dimensions of about a nanometer. Manufacturing and fabricating devices in smaller size, such as micro and atomic scale, are of the main goal and the reason of rapid development of nanotechnology. Therefore, more advanced instruments are demanded to construct such tiny objects. The laser interferometers are widely used in linear and precise displacement measurements in nano scales [4,5].
In recent years, the nano-displacement measurement systems have been increased. Since Michelson in 1881 measured the distances based on interferometer for the first time, its resolution has been further increased, and the super-heterodyne interferometer was presented in 2001 by Yokoyama et al. [5]. Moreover, a specific kind of super-heterodyne interferometer with regards to industry requirement with more resolution has been introduced by Olyaee et al. in 2011 [6]. This interferometer has 4-fold resolution rather than the two-mode heterodyne interferometer and double resolution rather than the super-heterodyne interferometer introduced in Ref. [5]. The optical arrangement of their interferometer was similar to two-mode interferometer demonstrated by Guo et al. in 2000 [7], except that the three-mode laser has been used to increase the resolution instead of using two-mode light source.
Another important issue in interferometer is increasing use of electronic methods with high accuracy to measure directly the phase difference appeared in the interference pattern. Since electronic sections of interferometer can result in the increase of nonlinearity error [8-16], it is necessary to develop high-accuracy methods to detect phase. Null method has been considered as one of initial techniques. A small modulation optical path difference was introduced in Null method [17,18]. Another method first defined by Peck and Obetz was electronically fringe counting [19]. However, in this paper, we utilized super-heterodyne interferometry. In this method, a small displacement appears in the one of the interferometer beams [20,21] that was detected with the heterodyne method. In the super-heterodyne method first, two signals respectively received from base and measurement paths were amplified and converted into lower frequencies by double-balanced mixing. Finally, the phase difference, which is corresponded to the displacement, was measured by phase meter section.
The main objective of this paper is to design, simulation, and fabrication of nano-metrology electronic sections based on the super-heterodyne method, by which the displacement in nanometer scales can be measured. With regarding to the two signals received by super-heterodyne interferometer optical section, we designed and simulated the circuits required for measurement signal conditioner and phase detection. It is worth noting that these circuits must be able to respond to the demands of the electronic section.

System description

As shown in Fig. 1, the electronic section includes signal conditioner and phase measurement [13,16]. In the signal conditioner, the low-level photocurrents are converted to voltage and then are transferred to lower frequency by double-balanced mixers. The phase difference between two photocurrents is used to measure the displacement. Two photocurrents can be described as follows [6]:
iom1=cos(2πfbt+ψ+2Δφ),
iom2=cos(2πfbt+ψ-2Δφ),
wherefb is the secondary beat frequency, ψ is the nonlinearity error, and Δφ is the phase difference caused by optical path difference (OPD).
Fig.1 Block diagram of nanometric displacement measurement electronic sections based on super-heterodyne method

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In the phase measuring section, some circuits for measuring precisely the phase difference between the base and measurement signals are required. If the phase difference, which is resulting from the target displacement, cannot be detected correctly, an error will appear lead to spoil the correct value of the displacement. Amplifying and mixing of signals produce the error components such as V4, V3 and so on. There exists the high-order harmonics beside the main signal, and they will limit the accuracy of nano-displacement measurement. At last, the phase difference between the measurement and reference signals (ΔΦ) is obtained as below:
ΔΦ=4Δφ+ψnl=(16nπ/λ)Δz+ψnl,
where n is the refractive index, Δz is the displacement measurement, and ψnl is the nonlinearity phase.
The first statement refers to the increased resolution in comparison with other systems [5,7], and the second statement is the nonlinearity error. In the subsequent parts, such circuits including low-noise amplifier (LNA), band-pass filter in order to pass the signal with primary beat frequency (500 MHz), double-balanced mixer (such as Gilbert cell) with the output intermediate frequency (IF) equal to the secondary beat frequency (300 kHz) with the range of the ratio of radio frequency to local oscillator (RF/LO) equal to 500 MHz, low-pass filter to pass signal with the secondary beat frequency and the phase measuring circuit were designed, simulated and compared with the practical results of the important electronically parts of the interferometer.

Design and results

The first part of electronic section of super-heterodyne interferometers is an amplifier. It should amplify the photocurrent coming from the detector and convert it to voltage. Since the least entering voltage level is determined by amplifier noise figure (NF), the use of very low-noise amplifiers is vital. It is also necessary for the amplifier to provide low-consuming power, input adaptation, low NF and low chip area. Thus, the best arrangement for this stage is using of LNA
Here we have designed a cascade metal-oxide-semiconductor field-effect transistor (MOSFET) LNA by using Source Degeneration topology. The Agilent metal-oxide-semiconductor (CMOS) 0.5 µm technology is used in this design. The smallest length of the gate is 0.6 µm. The simulated amplifier schematic has been shown in Fig. 2.
Fig.2 Schematic of cascade LNA with source inductive degeneration

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As shown in Fig. 2, the cascade is a combination of a common source stage with a common gate stage. This combination affects the output impedance. Because of the capacitive load in this arrangement, the frequency response of the first stage restricts to the miller effect. In other word, it causes less gain and consequently more stability. Gate inductor is computed as follows:
Lg=QLRsω0-Ls,
whereω0 (=(2π×500MHz)=3.14×109rad/s) is the central frequency, therefore,Lg=4.2nH. The value of W/L of cascade part is usually obtained as below:
W=32CgsCoxLmin,
where Cox and Cgs are the oxide and gate-source capacitors, respectively, and Lmin is the minimum gate length.
On the other hand, the value of W/L of cascade part is commonly considered as same as that of the LNA of the first stage. Thus, the gate-width ratio of the MOSFETs is equal to 500/0.6 µm. At least 2 V is required in cascade mode to drive the gates. Here the source is set to be 2.5 V, and the consuming power is 30 mW. The NF as well as the voltage gain has been demonstrated in Fig. 3.
Fig.3 (a) Voltage gain versus frequency of cascade LNA; (b) minimum NF (NFmin) and NF with Z0 ohm (nf(2))

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As shown in Fig. 3(a), the gain of frequency‎ 500 MHz ‎is 19.1 dB that is a desired gain’s value. The curve in Fig. 3(b) indicates the changes of NF. Besides, the minimum noise of the circuit is 0.4 dB. In the normal simulating conditions, the NF value in the frequency of 500 MHz is equal to 2.8 dB.
According to the results of design and simulation, such as amplifiers ADL5521, ADL5536, and ADL5602 have suitable characteristics for practical purposes, and they can be used. A comparison between the simulation results and the characteristics of available chips in the frequency of 500 MHz is shown in Table 1.
Tab.1 Comparison between simulation results and characteristics of available chips in the frequency of 500 MHz
parameternoise factor (NF)/dBreverse transmission (S12) /dBgain (S21) /dB
predicted2.5-2820
simulated2.8-26.02119.1
ADL55362.7-22.6119.41
ADL55210.8-23.820.3
ADL56023.3-23.0820.25
The second block of the electronic section is the band-pass filter with central frequency of 500 MHz and band width value of 400 kHz. It is used to pass the signal with the primary beat frequency. The schematic of the designed band-pass filter is demonstrated in Fig. 4. Figure 4 shows a Bessel-type ‎third order band-pass ‎filter.
Fig.4 Third order band-pass Bessel-type filter

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The third important block is the mixer that should obtain a lower frequency level by self-mixing the input frequency. The most common double-balanced mixer used in high-frequency circuits is Gilbert cell [22]. In fact, the mixers are nonlinear tools that are used in various systems for mixing frequencies. In super-heterodyne interferometer, the inputs after amplifying are self-multiplied. The mixer output has secondary beat frequency, which can be extracted by low-pass filter.
The designed mixer with low single-sideband (SSB) NF, suitable gain, and high linearity is shown in Fig. 5. The radio frequency (RF) signal ‎is applied to the transistors M2 and M3 that convert the voltage to current. For proper operation of this circuit, the resistor degeneration will be added to the source terminals of M2 and M3. Mixing operation is then accomplished by M4 and M7 MOSFETs. The switching function is provided by mixing the current of the RF signal received by the transistors M2 and M3, with the signal of local oscillator (LO) applied through M4 and M5. The expected characteristics of the mixer of electronic part of the nano-metrology system have been summarized in Table 2. The gain of the first stage is determined using gm as Eq. (5):
gm=2KNWIDL,
where ID is the drain current, W and L are the length and width of gate, respectively.
Fig.5 Schematic of designed Gilbert cell

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Tab.2 Expected characteristics of suitable mixer
Parameterunitcharacteristic
FrequencyMHZ300-700
noise figure (DSB)dB<10
voltage gaindB>8
power consumptionmW<100
source impedance50
load impedance500
IIP3dBm>20
voltage sourceV±2.5
The level of driving voltage (Vgs-VT) should be set in the range of 0.2-0.4 V. Another useful relation associated withgm, which is needed for this design is described as Eq. (6):
gm=2ID(Vgs-VT).
Since the designed LNA in the previous part has the output impedance of 50 Ω, the input resistance of the mixer should have the matching impedance. The initial value of Rs is set to be 10 Ω. Moreover, we utilized the CMOS14 0.5 µm technology to analyze the circuit. In the first step of the simulation, we assumed the width of all gates to be 231 μm. However, it should be taken into account that switching MOSFETs must be derived with the value of the gate driving voltage with the range of 200-400 mV. According to Eq. (6) and assumingVgs-VT=0.3V, the trans-conductance is equals to gm=0.02. Substituting these values in Eq. (5), we had W=233μm. The values of the designing parameters are summarized in Table 3.
Tab.3 Designing parameters used for simulation of Gilbert cell mixer
parametervalue
tail current6 mA
source degeneration impedance10 Ω
mosfet gate width233 µm
mosfet gate length0.6 µm
load impedance500 Ω
power supply2.5 V
The voltage amplitude in the input of RF is equal to 0.02 V. Since the mixer’s gain is 7.5 dB, the amplitude of the IF voltage in the output is equal to 0.113 V. The curve of IIP3 of the designed mixer has been demonstrated in Fig. 6. We used the graphical method to obtain IIP3. Regarding to the harmonics amplitude shown in Fig. 3, the IIP3 in lower sideband (LSB) is 24 dBm while it is just 19.433 dBm in upper sideband (USB) ‎. To construct the mixer, one can use the components such as ADL5801, SYM-25 DHW and ADL5802 that involves characteristics proportioned to our needs. Each of these components has the input-output frequency ranges proportional to the frequency of the mixer of the nano-metrology system. Table 4 shows the comparison between the simulation and practical results of the selected chips.
Fig.6 Frequency spectrum of mixer output and computing IIP3

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Tab.4 Comparison between simulation and practical results of mixer section
1 dB compression pointIIP3RF to IF isolationLO to RF isolationLO to IF isolationconversion gain (at 500 MHz)
simulation24 dBm100.2 dB87.9 dB48.3 dB7.511 dB
ADL580113.3 dBm28.5 dBm-35 dBc-30 dBm-27 dBm7.5 dB
The fourth block is the low-pass filter that can extract a sinusoidal signal with 300 kHz secondary beat frequency from the mixer output. The schematic of filter is illustrated in Fig. 7. The transfer function of this filter is given by
H(S)=2.7×1016S3+7.299×100.05×S2+11S+2.7×1016.
The output signal of this filter is demonstrated in Fig. 8, which has the frequency of 300 kHz and the amplitude of 15 mV. A similar signal receives from another path, i.e., the base path. There exists a small phase difference between these two signals according to the optical path difference (OPD).
Fig.7 Third-order Bessel type low-pass filter

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Fig.8 Output signal of mixer after passing through low-pass filter

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The last part of the electronic section of the super-heterodyne interferometer is the phase measuring section. After recovering the signals received from the detector by using a high‎-speed comparator, they are converted to digital signals. Then, they are transmitted toward the phase-meter section. Two pulses with the frequency of 300 kHz and difference phases are fed to this section from the base and measurement paths.
In the super-heterodyne interferometer, the phase angle ϕ(t) is measured by counting the interval time and using high-speed clock pulse. This means that the parameters of time resolution and signal frequency determine the angular resolution. Therefore, we have [23,24]:
Δθ=360°fΔτ,
where Δθ is the angular resolution in degree, f is the signal frequency in terms of Hz, and Δτ is the time resolution in second. Therefore, higher resolution of the counter results in higher angular resolution.
Meanwhile, two produced pulses with small phase differences are applied to a high speed counter. This counter is a time-to-digital converter (TDC-GP1 type) that converts time intervals to digital values. The obtained count is converted to the phase using Eq. (9) and is displayed on LCD (see Fig. 9).
Δφ=360°fNΔτ,
According to Fig. 9, the pulses are fed to the input of STOP1 and STOP2 (the pin no.38 and no.41). TDC-GP1 counters the clock pulse during the phase difference interval between two pulses [25]. Subsequently, the counting outputs are stored in the result registers and are readable through the microcontroller interface. The values are stored in this register in a sequence of 8-bit block [26].
Fig.9 (a) Schematic diagram; (b) TDC-GP1 connections in phase-meter section [26]

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Using the pins including WRN (no.31), RDN (no.30), CSN (no.32), and ALE (no.20), the values of the register TDC-GP1 are stored and read. The internal address is created with the pin ALE sets 1. Since registers can receive the addresses directly. Meanwhile, the primary initialization of the cheap is noticeable. Dependence on the measurement materials, the initialization is necessary before measuring. It can be done by activating the Reset pin (RST_N). Two pins namely EN-STOP2 and EN-STOP1 should be attached to the supply in order to activate the channels STOP 1 and STOP 2. The crystals ranges from ‎0.5 to 35 MHz‎ could be used (we used 16 MHz crystal‎‎‏ in this paper). The oscillations of microcontroller can damage the counter. Therefore, the separate voltage sources for TDC-GP1 and microcontroller‎ have been used to prevent from the possible damage. The voltages of 3.3 and 5 V are employed respectively for supplying the counter’s chip and the microcontroller. Besides, the liquid crystal monitors with the size of ‎2 × 16‎ characters have been used for displaying read data by microcontroller.

Conclusions

In this paper, the electronic sections of super-heterodyne laser interferometer have been designed, simulated, and fabricated to measure displacement in nanometer scale. The circuits include LNA, band-pass filter to pass the signal with the primary beat frequency 500 MHz, double-balanced mixer with IF output of 300 kHz and RF/LO ratio of 500 MHz, and those circuits were required for connecting to the mixer, for example, Balloon circuits was used to convert differential output to single output, low-pass filter to passing signal with frequency of 500 MHz. Phase measuring circuit was designed and successfully implemented.
Since the level of current received from the optical part is low, a cascade LNA with CMOS 0.5 µm technology and gate width of 500/0.5 µm were designed and simulated. The 19.1 dB gain and the NF of 2.8 dB in the frequency of 500 MHz have been achieved. With regard to these characteristics, we used a practical type of ADL5536 with gain of 19.41 dB and NF of 2.7 dB. A band-pass filter of Bessel type with central frequency of 500 MHz was also simulated. Then, we designed and simulated a double-balanced mixer of Gilbert cell, where a conversion gain of 7.511 dB at RF input of 500 MHz was measured, while the LO input was 500.3 MHz and IF output was equal to 300 kHz. In practice, we used mixer ADL5801 for this section. This mixer involves the conversion gain of ‎7.5 dB, compression point of 13.3 dBm, third-order harmonics of 28.5 dBm, isolation ratio of LO to IF of -27 dBm, LO to RF isolation equals to -30 dBm, and the RF to IF isolation of -35 dBc. A low-pass filter of Bessel type with the cut off frequency of 300 kHz was used after the mixer in order to extract the signal with the secondary beat frequency. At last, two recovered analog signals were given to a high-speed comparator. After converting those into digital pulses, they were sent to the phase meter section. In practice, a high-speed counter with resolution of 1 ns namely TDC-GP1was used in the phase meter section.
This counter converted time intervals to digital values, and the obtained count that had a relation with the phase, was displayed on the LCD by the microcontroller. Eventually, the phase corresponded to the nanometer displacement in the super-heterodyne interferometer system was demonstrated.

Acknowledgements

This research was based on work done at Nano-photonics and Optoelectronics Research Laboratory (NORLab) at Shahid Rajaee Teacher Training University, Tehran, Iran. The authors thank Mrs. Atefeh Najibi for helpful editing. They also would like to thank anonymous referees for their impressive and helpful comments and suggestions, which considerably improved the contents and the presentation of the manuscript.
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