High performance of low voltage controlled ring oscillator with reverse body bias technology

Abstract

In complementary metal oxide semiconductor (CMOS) nanoscale technology, power dissipation is becoming important metric. In this work low leakage voltage controlled ring oscillator circuit system was proposed for critical communication systems with high oscillation frequency. An ideal approach has been presented with substrate biasing technique for reduction of power consumption. The simulation have been completed using cadence virtuoso 45 nm standard CMOS technology at room temperature 27°C with supply voltage V_dd = 0.7 V. The simulation results suggest that voltage controlled ring oscillator has characterized with efficient low power voltage controlled oscillator (VCO) in term of minimum leakage power (1.23 nW) and maximum oscillation frequency (4.76 GHz) with joint positive channel metal oxide semiconductor and negative channel metal oxide semiconductor (PMOS and NMOS) reverse substrate bias technique. PMOS, NMOS and joint reverse body bias techniques have been compared in the presented work.

Keywords

voltage controlled oscillator (VCO) / leakage power / active power / oscillation frequency / efficiency / cadence tool

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Acknowledgements

This work was supported by ITM University Gwalior, with the calibration cadence design system Bangalore.

RIGHTS & PERMISSIONS

2014 Higher Education Press and Springer-Verlag Berlin Heidelberg