OSTP: Bridging Spatial and Temporal Locality with Object-Type-Aware Hardware Prefetching

Abstract

Modern object-intensive workloads, where dynamically allocated, typed data objects dominate memory traffic, pose fundamental challenges for conventional hardware prefetching mechanisms. Existing spatial prefetchers operate at fixed memory region granularities, causing pattern fragmentation when semantically identical objects scatter across non-contiguous addresses. Temporal prefetchers, while capable of capturing irregular access sequences, incur prohibitive on-chip storage overhead by tracking fine-grained cache-line-level traces and suffer from cold-start inefficiency for newly allocated objects. This paper presents OSTP, the first hardware prefetching mechanism that unifies temporal and spatial locality exploitation at typed-object granularity, rather than at the region or cache-line granularity of prior unified approaches. By leveraging a lightweight compiler-hardware interface to associate memory accesses with object type identifiers and intra-object offsets, OSTP introduces three key innovations: (1) object-granular temporal trace recording via the Physical-Structural Table, which elevates temporal tracking from individual cache lines to entire object instances, drastically reducing metadata storage requirements while capturing long-range inter-object correlations; (2) type-specific intra-object spatial prefetching via the Object Learning Table and Object Pattern Table, which learn and reuse stable access footprints across all instances of the same type, eliminating spatial pattern fragmentation; and (3) adaptive on-chip space allocation that dynamically partitions shared metadata storage between temporal and spatial structures to maximize performance across varying program phases. Evaluated on object-intensive workloads, OSTP achieves a 1.32× average speedup over no-prefetcher baselines with only 47KB on-chip overhead, outperforming state-of-the-art spatial prefetcher Bingo (1.25×, 119KB overhead), temporal prefetcher STMS (1.16×), and other leading designs, demonstrating that bridging the semantic gap between object-oriented programming models and hardware prefetching mechanisms enables simultaneous improvements in both performance and resource efficiency.

Keywords

hardware prefetching / temporal prefetching / spatial prefetching / cache / compiler / software-hardware co-design

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The Author(s) 2026.

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