PyABV: a framework for enhancing PyRTL with assertion-based verification

Yue CHENG , Tun LI , Hongji ZOU , Wanxia QU

Front. Comput. Sci. ›› 2025, Vol. 19 ›› Issue (7) : 197204

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Front. Comput. Sci. ›› 2025, Vol. 19 ›› Issue (7) : 197204 DOI: 10.1007/s11704-024-40127-0
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PyABV: a framework for enhancing PyRTL with assertion-based verification

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Yue CHENG, Tun LI, Hongji ZOU, Wanxia QU. PyABV: a framework for enhancing PyRTL with assertion-based verification. Front. Comput. Sci., 2025, 19(7): 197204 DOI:10.1007/s11704-024-40127-0

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References

[1]

John L K . Agile hardware design. IEEE Micro, 2020, 40( 4): 4–5

[2]

Clow J, Tzimpragos G, Dangwal D, Guo S, McMahan J, Sherwood T. A pythonic approach for rapid hardware prototyping and instrumentation. In: Proceedings of the 27th International Conference on Field Programmable Logic and Applications. 2017, 1−7

[3]

Vijayaraghavan S, Ramanathan M. A Practical Guide for SystemVerilog Assertions. New York: Springer, 2005

[4]

Wille R, Fey G, Messing M, Angst G, Linhard L, Drechsler R. Identifying a subset of system Verilog assertions for efficient bounded model checking. In: Proceedings of the 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools. 2008, 542−549

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