Hybrid algorithm combining genetic algorithm with back propagation neural network for extracting the characteristics of multi-peak Brillouin scattering spectrum

Abstract

In this study, a hybrid algorithm combining genetic algorithm (GA) with back propagation (BP) neural network (GA-BP) was proposed for extracting the characteristics of multi-peak Brillouin scattering spectrum. Simulations and experimental results show that the GA-BP hybrid algorithm can accurately identify the position and amount of peaks in multi-peak Brillouin scattering spectrum. Moreover, the proposed algorithm obtains a fitting degree of 0.9923 and a mean square error of 0.0094. Therefore, the GA-BP hybrid algorithm possesses a good fitting precision and is suitable for extracting the characteristics of multi-peak Brillouin scattering spectrum.

Keywords

fiber optics / Brillouin scattering spectrum / genetic algorithm (GA) / back propagation (BP) neural network / multi-peak spectrum

1 Introduction

Since the first light-emitting diode (LED) was invented by Holonyak and Bevacqua in 1962 [1], LEDs have made remarkable progress over the past four decades with the rapid development of epitaxy growth [2], chip design and manufacture [3], packaging structure, processes and materials. In the early 1990s, Nakamura successfully grew blue and green LEDs on a GaN substrate [4,5]. In 1995, the method that applies blue LED chips with YAG∶Ce phosphor to generate white light was discovered and first enabled white LEDs to be commercially available [6,7]. White LEDs have superior characteristics such as high efficiency, small size, long life, dependability, low power consumption, and high reliability [8]. The market for white LEDs is growing rapidly in various applications such as large size flat panel backlighting, street lighting, vehicle forward lamps, museum illumination and residential illumination [9-11]. It has been widely accepted that solid state lighting, in terms of white LEDs, will be the fourth illumination source to substitute the incandescent lamp, fluorescent lamp and high pressure sodium lamp [12].

The emerging illumination applications require white LEDs to provide higher performance while reducing cost to an acceptable range for consumers. Currently, the highest luminous efficiency of commercial high power white LEDs is close to 110lm/W, which is adequate for the requirements of most applications. However, the performance price ratio of LEDs is almost ten times lower than that of traditional lamps, which restricts the penetration of white LEDs in the market for general illumination. Thus, further researches are needed to improve performance and cut down cost.

In 2008, Philips Lumileds and Osram Opto Semi- conductors unveiled impressive lab results with a luminous efficiency of 140lm/W using a 1mm² chip at a driven current of 350mA [13]. Packaging is considered critical to realize the low-cost industrial manufacture of these lab records. The theoretical viewpoint is that LEDs can work as long as ten thousand hours with perfect conditions. However, the LED chip is very sensitive to many damages in terms of electrostatic discharge, moisture, high temperature, chemical oxidation, and shock. Packaging protects LED chips from these damages. In addition, packaging enhances light extraction to provide high luminous flux, dissipates generated heat from the chip to increase reliability and life and controls the color for specific requirements [14]. The trend of high performance price ratio of white LED proposes more rigorous requirements on packaging.

This paper reviews the status of phosphor-based white LEDs in four aspects: optical control, thermal management, reliability and cost. Factors affecting light extraction and color control are discussed. It is believed that phosphor plays the most important role in optical performance. Degradation of the phosphor layer caused by localized heat can induce serious lumen loss and color variation. Effective thermal management can dissipate heat rapidly and reduce the thermal stress caused by a mismatch of the coefficient of thermal expansion (CTE). Low junction temperature will improve the reliability and provide longer life. Advanced processes, precise fabrication and careful operation are essential for high reliability LEDs. Reliability issues caused by coupling behaviors of electrical and thermal stresses are not clear for power LEDs with high current. Cost has been the biggest obstacle for the entry of white LEDs into the market for general illumination. Finally, the prospect for high power white LEDs is presented. The trends of LED packaging are discussed and predictions are introduced to facilitate the development of LED packaging.

2 System view for packaging design

The main requirements of white LED packaging are high luminous efficiency, high color rendering index (CRI), adjustable correlated color temperature (CCT), excellent color stability, low thermal resistance, rapid thermal dissipation, high reliability and low cost. It is not a simple task for packaging to satisfy these requirements simultaneously. There normally exist some contradictions such as high luminous efficiency and low CCT, high performance and low cost [15]. Warm white LED with low CCT needs the addition of longer wavelength phosphor, which will increase the conversion loss and thereby reduce the luminous flux. Advanced packaging materials and techniques are essential for high performance LEDs, whereas low cost limits material selection. Diamond has super thermal conductivity (2000W/mK), but the expensive charge makes it impossible for thermal dissipation. Packaging design should balance these contradictions and guarantee the most favorable targets.

White LED packaging is a complicated science and engineering technique, as shown in Fig. 1. It mainly concerns optics, thermology, materials, mechanics, electronics, packaging process and equipment. These aspects are correlated and determine the final cost and performance of white LEDs. Optical control, thermal management, reliability and cost are the four primary issues for packaging design. Designers cannot focus on one aspect without considering the impact of other aspects. Light extraction and thermal dissipation are normally interplayed. If more light is extracted, less heat should be dissipated. Low junction temperature will further increase the initial optical power and make the LED brighter. In contrast, if less light is extracted or the junction temperature is too high, there will be a harmful optical- thermal cycle that can damage the chip and cause degradation of materials. Other reliability issues such as delamination and cracks may also emerge and shorten the lifetime. Since the cost of LEDs is estimated to be higher than traditional lamps in the next 2-4 years, designers should first try to improve LED performance. The correlation of these packaging issues demands that white LEDs should be co-designed as an optical-thermal-reliable system. Construction of system level design platform is therefore important for LED packaging.

Fig.1 Schematic diagram for packaging with various design issues

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An excellent packaging design should not only focus on the issues caused by the individual package, but also address the issues caused by the operation of LEDs. Designing and manufacturing a single LED package without specifically considering the impact on the environment and usage may induce unexpected results such as elevated temperature, poor weldability and installation damage. Typical examples include the shedding of Cree XLamp’s lens and surface contamination of Seoul Semicon’s silicone encapsulants. To reduce lamp cost, manufacturers prefer increasing the driven current to more than 500mA to provide high lumen output, which will accelerate LED failure. The second optical lens is sensitive to the position of the LED, which may be varied by reflow soldering. Therefore, designers should carefully choose materials and package configurations to avoid manufacturing “defective” products. Packaging design tolerance should also be higher to make the LED durable in more rigorous conditions. System solutions for specific applications are essential for future packaging design.

3 Optical control

Optical performance is the primary concern of LED packaging, since it determines whether white LEDs have the potential to substitute traditional lamps. Evaluation indices of optical performance normally include luminous efficiency (LE), correlated color temperature (CCT) and color rendering index (CRI). To eliminate the influence of heat on optical performance, the general testing approach is applying pulsed current with 150ms testing time to driven white LEDs. This approach measures the initial optical performance, which is higher than actual performance.

As depicted in Fig. 2, the basic packaging elements of phosphor-based white LEDs include the chip, phosphor, encapsulant lens, reflector and substrate. Reflector is not necessary, but it can concentrate light and change the intensity distribution. The initial optical performance is mainly determined by packaging materials, configurations and processes. Phosphor is considered the most important material, and its emission spectrum determines the luminous flux according to visual sensitivity function. Color indices such as CCT and CRI also depend on the characteristics of phosphor. Encapsulant materials affect the initial extracted power from the chip and final light output from the module by refractive index, and control the light intensity distribution by the shape of the lens. Packaging configurations provide approaches to maximize optical performance by optimal design of the reflector, phosphor and encapsulants, whereas processes determine the most suitable and economical configuration as the solution of high-power LED packaging.

Fig.2 Simplified model for a single-chip package

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3.1 Phosphor coating

Phosphor coating is one of the most important steps in packaging processes. Figure 3 is the scanning electron microscope (SEM) picture of YAG∶Ce phosphor particles. Scattering enhancement particles such as SiO₂ are preferred in phosphor to obtain uniform white. The average radius of phosphor particles is 5-8μm. In one LED module, the number of phosphor particles is generally more than 1×10⁵per mm³. This indicates that there may be millions of phosphor particles in a phosphor layer. Therefore, light will encounter many particles and be multi-scattered during the propagation. Each YAG phosphor particle absorbs blue light and emits yellow light. It means that the blue light is weakened gradually, whereas the converted yellow light increases with an increase of scattering. Therefore, the final emitted white light significantly depends on the scattering chances of light. If the propagation length of one ray is longer or the scattering times are more than that of other rays, the color of this ray may tend to be yellow. The opposite case is that color tends to be blue. Since the propagation length and scattering times are related to the thickness and concentration of phosphor, there should be an attempt with the phosphor coating to make the thickness and concentration as uniform as possible.

Fig.3 SEM picture of phosphor particles (the sizes of phosphor particles are irregular. Study normally applies the average radius to represent the dimension of phosphor particle. SiO2 particles are used to enhance the scattering)

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Normally there are three phosphor coating approaches for LED packaging as shown in Fig. 4: freely dispersed coating, conformal coating and remote coating. In the first and third approaches, phosphor particles are uniformly mixed with silicone to obtain phosphor silicone. Phosphor silicone is then fabricated to be a film to form a phosphor layer. Phosphor silicone can be conveniently handled by dispersing equipment. However, the phosphor self-deposition caused by weight should be given special attention, as it can result in an inhomogeneous concentration distribution.

Fig.4 Illustrations for three phosphor coating technologies. (a) Freely dispersed coating (light color is varied from yellow to white to blue. Representative corporations are Everlight and Seoul Semicon. Modified method is applying a mold to improve the uniformity of thickness); (b) conformal coating (light color is almost white. Representative products are Luxeon from Lumileds and XLamp from Cree); (c) remote coating (light color is varied from white to yellow. The surfaces of pre-cured encapsulants and phosphor can be found to be concave. Representative corporations are LedEngin and GELcore. Modified method is remote coating phosphor with spherical shape)

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Freely dispersed coating is the oldest method that was developed from low power white LEDs. This approach disperses phosphor silicone on a chip without a mold restricting its flow until a surface balance is achieved. The phosphor layer shape is normally convex and the central zone on the chip is thicker than that of the marginal zone. Therefore, color of light emitted from the central zone tends to be warm white, whereas color from the marginal zone tends to be cool white. An advantage of this method is that thickness of the phosphor layer can be easily controlled by the volume of the phosphor silicone and size of the dispersing zone. No special techniques are required, thereby reducing manufacturing time and cost. Corporations in China widely adopt this method to massively produce white LEDs with low cost.

However, this approach cannot fabricate high quality white LEDs. To obtain balanced white light across the chip, thickness of the phosphor layer is normally in the range of 0.2-0.5mm to avoid insufficient conversion for side emitting blue light. Therefore, concentration of phosphor silicone cannot be too high, otherwise the color will tend to be yellow. Increased propagation length induces the reduction of luminous flux. In addition, to accelerate production efficiency, the viscosity of phosphor silicone is controlled in the range of 3000-5000mPa·s to make it easily flow and achieve surface balance. The dispersing time is longer than 500ms, while the inner radius of the nozzle is normally larger than 0.25mm. These indicate that controlling the volume of phosphor silicone with micron precision is difficult. Therefore, repeatability and consistency are relatively lower and may reduce the yield rate of products.

Unlike freely dispersed coating without special manipulation of phosphor, conformal coating is really an advanced packaging process. This approach fabricates an extraordinarily thin phosphor layer by stacking phosphor particles to obtain high concentration. Phosphor film is uniformly coated on the chip surface to generate uniform white light. Conformal coating was first developed by Lumileds, which applied an electrophoretic method [16] to deposit charged phosphor particles on the chip surface. Controlling the voltage and deposition time can adjust the thickness of the phosphor film. Therefore, conformal coating can easily realize micron precision. Other developed approaches such as slurry, settling [17], evaporating solvent [18] and wafer-level coating [19] can also conformally coat phosphor in chip scale. Since the thickness is significantly reduced, the shortened propagation length will decrease the redundant scattering times and thereby increase the lumen output. Conformal coating requires special handling in the following process steps, since the phosphor film is thin and fragile. A small force may damage the film and induce delamination between film and chip.

The former two technologies both fabricate the phosphor layer directly on the chip surface. The advantage is that the LED size is minimized and can be used for high density packaging. However, experiments confirmed that there was approximately 50%-60% light back-scattered by the phosphor layer [20,21]. These light rays will be re-absorbed by the chip and energy is partly lost. In addition, localized heating caused by the high power chip can induce thermal quenching and reduce the quantum efficiency (QE) of phosphor [22]. Temperature of phosphor particles may as high as 120°C and QE can be decreased to 70%.

Adjusting the phosphor layer to remote location can reduce chip absorption and increase the light extraction [23-25], since only a small part of light rays will reach the chip and be absorbed. Increased distance also improves the color stability by lowering the surface temperature of phosphor [26]. This coating approach normally requires a reflector to place the phosphor layer. Surface treatment of the reflector is essential to offer high reflectivity. Ag is the most favorable coating material. After a soft encapsulant layer is cured on the chip, phosphor silicone is dispersed in the reflector. Applying phosphor silicone will also confront the limitations as discussed in freely dispersed coating. Techniques from conformal coating such as settling and evaporating solvent can be utilized in remote coating to improve thickness and concentration control. However, the main disadvantage of remote coating is that the shape of phosphor layer is not perfectly plane. Affected by the surface tension of liquid, the pre-cured encapsulant materials and phosphor layer normally present concave surfaces. Curvatures of these surfaces are dependent on the dimensions and surface roughness of the reflector, viscosity of phosphor silicone, operation temperature and other variables. With the increase of reflector angle, the surfaces will tend to be flat. However, the packaging size will be significantly increased if the angle is larger than 45°. High viscosity or low temperature can also reduce the wetting angle to make the surfaces more flat. However, these methods cannot fundamentally solve the issue. Since the viscosity of phosphor silicone is generally higher than that of pre-cured encapsulant, the curvature of phosphor silicone will be larger, i.e., the phosphor layer is slightly thicker in central zones.

The reason why we focus the reviews of phosphor coating approaches on the uniformity of thickness and concentration is mainly due to the consideration of spatial color distribution (SCD). SCD is becoming one of the most interesting indices for white LEDs except LE, CCT and CRI. Human eyes are sensitive to color variation. If the uniformity of SCD is poor, eyes will feel uncomfortable. The actual lighting effect is also lowered.

Since the central zone of the phosphor layer is thicker in a freely dispersed coating, there normally is a yellow spot in the illumination map [27]. Seoul Semicon developed an improved method by applying a mold to restrict the flow of phosphor silicone. Thickness of phosphor layer across the chip can be more uniform if the height of the mold is equal to the sum of chip height and desired phosphor thickness. What should be given special attention is the demoulding process. Since the mold is under the gold wires, demoulding should be carefully handled to avoid damaging the gold wires.

To make the phosphor layer with uniform plane shape in remote coating, Narendran et al. [28,29] developed the scattering photon extraction (SPE) method by coating phosphor on a secondary optics. If LED packaging only concerns LE, remote coating is definitely a recommended approach. The improvements of LE are 7%-16% for ordinary remote phosphor and 30%-60% for SPE configuration. However, SCD of remote coating with plane phosphor is rather poor. The uniformity is normally lower than 30% and generates a visible yellow ring [30]. Fabricating phosphor layer with convex shape [31,32] is an attractive technology. Uniformity of SCD can be improved to more than 70% while keeping a higher lumen output. However, this technology is difficult to realize by current processes since the flow of phosphor silicone will generate non-uniform thickness and deposition of phosphor particles on convex surface cannot have strong adhesion.

Conformal coating is considered to be the most competitive phosphor coating approach, although the process cost is relatively higher than the other two approaches. Uniformity of SCD is generally higher than 75%. There are also no demoulding issues. Since the phosphor layer is chip scale, the size of the package can be more compact. The latest record is from Cree, which reduces the size to 3.45mm×3.45mm. With the development of mass production, reduced material cost can counteract process cost and finally cut down the total cost.

3.2 Light extraction

High luminous efficiency normally requires high light extraction. There are two parts of light to be extracted for phosphor-based white LEDs. One is blue light from the chip, while the other is converted light by phosphor.

The extraction efficiencies of blue light and converted light can be expressed as

(1)$${\eta }_{\mathrm{Blue}}=E_{\mathrm{chip}}(\mathrm{1}-{\alpha }_{\mathrm{chip}}-{\alpha }_{\mathrm{phos}}-{\alpha }_{\mathrm{encap}}-R_{\mathrm{loss}}),$$

(2)$${\eta }_{\mathrm{Conv}}={\alpha }_{\mathrm{phos}}{\eta }_{QE}{\eta }_{\mathrm{Stokes}}(\mathrm{1}-{{\alpha }^{\prime }}_{\mathrm{chip}}-{{\alpha }^{\prime }}_{\mathrm{encap}}-{R^{\prime }}_{\mathrm{loss}}),$$

where η_Blue and η_Conv are extraction efficiencies for blue light and converted light; E_chip is initially extracted light ratio from the chip; α_phos is absorbed blue light ratio of phosphor; α_chip, α_encap, R_loss andα′_chip, α′_encap, R′_loss are lost light ratios by chip absorption, encapsulant absorption, and refraction/reflection in interfaces for blue light and converted light, respectively; η_QE and η_Stokes are quantum efficiency and Stokes efficiency of phosphor materials. The efficiencies and ratios are all calculated by radiometric units.

The sum of η_Blue and η_Conv is the total extraction efficiency. For a white LED with a luminous flux exceeding 100 lm, the total efficiency should be more than 30%. The ratio of η_Conv to η_Blue defines the color of white. When the ratio is in the range of 1.5-3.5, CCT of a white LED is expected to be varied from 8000 to 4000K.

Luminous flux L(λ) of white LEDs is calculated according to the visual sensitivity function V(λ):

$$L(\lambda )=P_{\mathrm{imput}}{\eta }_{\mathrm{interQE}}{\eta }_{\mathrm{injec}}{E}_{\mathrm{chip}}({\eta }_{\mathrm{Blue}}+{\eta }_{\mathrm{Conv}})V(\lambda ),$$

where λ is the wavelength of light; P_input is input electrical power, which is calculated by multiplying driven current with voltage; η_interQE is internal quantum efficiency, which is the ratio of emitted photon numbers to carrier numbers passing through the junction; and η_inject is a measure of the efficiency of converting total current to carrier transport in a P-N junction.

Another mostly concerned evaluation index for light extraction is packaging efficiency η_packaging, which can be calculated by Eqs. (1) and (2):

$${\eta }_{\mathrm{packaging}}={\displaystyle \frac{{\eta }_{\mathrm{Blue}}+{\eta }_{\mathrm{Conv}}}{E_{\mathrm{chip}}}}.$$

Currently, η_packaging is no more than 80% and the expected target is 90% in 2012 [12]. To improve light extraction, primary solutions are increasing E_chip and reducing lost energy caused by α_chip, α_encap, R_loss and α′_chip, α′_encap, R′_loss. Characters of phosphor such as η_QE, η_Stokes, spectrum and wavebands are also important for a higher lumen output.

E_chip is mainly determined by chip structure and refractive index (RI) of encapsulant materials directly coated on the chip surface. When the top surface of a chip is a plane, E_chip is estimated to be approximately 14%-16% for cases without encapsulation. Figure 5 displays the effect of RI on light extraction of a chip. It can be found that when the RI of encapsulants rises to 1.6, E_chip is approximately threefold that without encapsulants. If the chip surface is roughened as shown in Fig. 6, extraction efficiency for cases without encapsulants may be as high as 30%-50% [33-35]. This is normally twofold higher than conventional LEDs and makes such a roughened chip favorable for high brightness LED packaging. However, the improvements of encapsulants on light extraction will not be as significant as conventional LEDs. Estimated value for encapsulants with RI of 1.6 is in the range of 1.1-1.5. In addition, dispersing encapsulants on the roughened chip should be carefully handled to avoid small bubbles. Since the roughened size is normally nano-micro scale, air can be easily trapped in small zones in the fast flowing and prototyping process of encapsulants. As shown in Fig. 6, light may be repeatedly absorbed by the chip and reduce light extraction. In the worst case, E_chip with encapsulants will be lower than that without encapsulants.

Fig.5 Influences of encapsulants’ RI on Echip of plane surface chip (angle is the critical angle in which light can be extracted from chip to encapsulants)

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Fig.6 Illustrations for chips with roughened surface (the size of roughness is nano-micro scale. Roughened surface presents higher opportunity for light extraction. Small bubbles reduce the chances that light can be directly emitted out)

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In freely dispersed coating and conformal coating, the first encapsulant layer is mixed with phosphor particles. RI of phosphor is 1.8, whereas RI of embedding materials such as epoxies and silicones is in the range of 1.4-1.6. Therefore, mixing silicones with phosphor can provide higher RI and E_chip than cases without applying the mixture as the first encapsulant layer such as remote coating. However, RI of the mixture cannot exceed 1.8 until refractive indices of encapsulants are further improved. RI of silicone can be controlled by adjusting the ratio of methyl and phenyl units in a silicone system, but the increase will be limited and can induce tremendous research investment. An economical method is adding transparent nano-particles with high RI such as TiO₂ to encapsulants [36].

After light is extracted from the chip, high transparency encapsulants and optimized packaging structures are essential to reduce α_chip, α_encap, R_loss andα′_chip, α′_encap, R′_loss. Silicones are more favorable than epoxies in high-power LED packaging. When the power of LED is increased, epoxies show considerable yellowing at higher operating temperature [37]. This yellowing reduces the transparency of epoxies to less than 70% and presents high absorption for visible light. Higherα_encap andα′_encap will generate significant lumen loss and color variation and consequently shorten lifetime. Silicones have high optical transmittance in UV-visible region [38,39]. The transparency is normally higher than 95% for thickness of 1mm. Thermal-opto stability of silicones is also excellent.

To further reduceα_encap and α′_encap, size of encapsulants should be minimized to decrease the propagation length. However, this will increaseα_chip and α′_chip. Reduction of size increases the surface ratio of the chip surface to the base surface of encapsulants. Back-scattered or back-reflected light will have more chances to enter the chip to be absorbed. Therefore, structures of encapsulants should be designed to decrease back-emitted light rays. The first approach is fabricating multi-encapsulants with gradient refractive indices. To avoid total internal reflection (TIR) between encapsulants and air, RI of the outermost layer should be lower than that of inner layers. Since RI of the inner layer coated on the chip surface is rather high, Fresnel loss in the interface will be high and increase R_loss and R′_loss if there is only two encapsulating layers. Adding intermediate layers to these two layers can guide light rays to escape the surface and decrease the chances of TIR. The intermediate layers cannot be too many, otherwise R_loss and R′_loss will be too high and counteract the improvement ofα_chip, α_encap andα′_chip, α′_encap. Process cost also limits the maximum number of layers. Fabricating three to four layers with gradient indices is considered to be acceptable for the requirements of performance and cost.

The second approach is changing the curvatures of local zones and fabricating specific structures in lens and reflectors to decrease the TIR chances of light when escaping from the lens surface [40-44]. The reflector can change the directions of side emitting light rays from chip to central angles. Roughened surface of reflector scatters back reflected light and reduces the chances of light being reflected to the chip. However, it has been found that the improvement is slight if the phosphor layer is directly coated on the chip [45]. The reflector is considered to play a more important role in remote coating approach and the increase of light extraction can reach 15.4% [23,24]. Lens is expected to be more critical in light extraction. Theoretically, lens surfaces can be designed to reduce the incident angle of most light and provide more chances for light to be directly emitted out without being re-absorbed by the chip and multi-reflected between lens and reflector. Maximum light extraction can be achieved by a refined lens, which has many discontinuous surfaces and micro-structures. Since the materials of lens are normally epoxies, plastics or silicone epoxies, shrinkage of these organic polymers is inevitable and leads to lens deformation. In addition, lens size should be extremely compact to reduce the cost of packaging materials. Thus, the refined lens cannot be commercially available unless new materials and processes are developed. Actually, the role of current lenses is controlling spatial intensity distribution and obtaining desired radiation patterns. Figure 7 displays three examples of these lenses. This lens design considers LED chip as a spot light source. However, the chip essentially is a surface source especially when the size of LEDs is minimized. Thus, this simplified method presents limited influences on light extraction. However, these lenses can satisfy requirements of specific application in which lumen output is not the primary issue but radiation pattern. Micro-lens array was believed to be a competitive method to reduce the packaging size and provide high light extraction and various radiation patterns simultaneously [46]. However, cost will be a serious issue.

Fig.7 Radiation patterns of three lenses. (a) Lambertian lens; (b) batwing lens; (c) side emitting lens (Lambertian lens is the most adopted configuration in LED packaging. Lambertian radiation can be used in applications such as road lamp, MR16; batwing lens and side emitting lens are suitable for applications such as backlighting and cell phone)

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The conversion loss caused by phosphor is another important component affecting light extraction. In good LED products such as Luxeon, XLamp and Golden Dragon, energy loss ratio caused byα_chip, α_encap, R_loss andα′_chip, α′_encap, R′_loss may not exceed 9% in the extracted light from the chip. However, it is estimated that the conversion loss of phosphor may be higher than 12% of E_chip. This is mainly due to the effects ofη_QE and η_Stokes. Currently, the highest η_QE is achieved by YAG∶Ce phosphor, η_QE of which is larger than 95% in 75°C [47]. η_QE of other phosphors such as red and green phosphor will be lower than 80% when temperature is higher than 80°C [48,49]. η_Stokes is determined by the excitation wavelength of chipλ_chip and emission wavelength of phosphor λ_phosphor [31]:

$${\eta }_{\mathrm{Stokes}}={\displaystyle \frac{{\lambda }_{\mathrm{chip}}}{{\lambda }_{\mathrm{phosphor}}}}\mathrm{.}$$

.

Generally, λ_chip of InGaN chip is 455-465nm and λ_phosphor of YAG∶Ce phosphor is 550-560nm. Therefore, η_Stokes will be lower than 85%. That means conversion efficiency, which is calculated by multiplying η_QE with η_Stokes, is lower than 82%. Therefore, the conversion loss is 18%. If α_phos of a white LED is 70%, the energy loss ratio by phosphor will be 12.6% of E_chip. When adding phosphors with wider spectrum or longer wavelength such as red phosphor to compensate for the color of white, η_Stokes will be further reduced and thereby increase the conversion loss.

3.3 Color control

The unique characteristic of white LEDs is that the color of light can be controllable by varying the configurations of phosphor. There are generally two approaches for color control: single-phosphor based (SPB) LEDs and multi-phosphor based (MPB) LEDs [50].

In SPB LEDs, the YAG∶Ce phosphor is the most favorable material to control color. By varying the thickness and concentration of the phosphor layer, color of light can be changed from cool white (5000-10000K) to natural white (4000-5000K) as shown in Fig. 8. This method is simple and can be easily handled to reduce manufacturing cost. In addition, the excitation spectrum of YAG∶Ce phosphor is wide (100-200nm) [51], which can provide higher CRI than traditional lamps such as cool white fluorescent lamp (CRI=63) and high pressure sodium lamp (CRI=20) [52]. CRI of SPB method normally ranges from 70 to 80, which can satisfy the demands of most applications such as road lamp and spot lighting.

Fig.8 Spectrums of SPB LEDs with various CCT (increasing thickness or concentration can change CCT to be lower)

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However, applications such as residential lighting and hotel lighting require warm white (2500-4000K) to make people feel more comfortable. Other applications such as medical lighting and museum illumination require high CRI (>90) to exhibit the natural color of objects [53]. Since the dominant waveband of SPB is in the range of yellow color, lack of green and red color in the spectrum make further improvement of CRI and CCT with YAG∶Ce phosphor rather difficult.

The MPB approach can solve this issue effectively. There are generally two configurations of phosphors for blue chip-pumped MPB LEDs. One is adding phosphors with longer wavelength such as red or orange red phosphors into YAG∶Ce phosphor [54,55]. The other is combining the blend of green and red phosphors with the blue chip, which generates white light by three primary colors [51,56,57]. Figure 9 exhibits the typical spectrums of these two configurations. Since the spectrum of MPB is much wider than that of SPB, especially in the region of red color, CRI can easily reach or even be higher than 90 and lowering of CCT is realizable. CCT can be controlled by changing the ratio of phosphors in the blend. Increasing the amount of red phosphor will emit more red lights and generate warm white.

Fig.9 Spectrums of MPB LEDs (Ra is the average value of CRI. Green line is the first configuration of MPB. In the second configuration of MPB, it can be found that CCT can be controlled from warm white to cool white while keeping high CRI)

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The MPB approach spurs the development of novel host lattices to obtain more efficient phosphors. Table 1 lists the representative phosphors for MPB LEDs. Eu²⁺ activated nitride and silicate compounds are the most associated materials and have developed a wide class of novel phosphors [51,53,58]. These phosphors present high quantum efficiencies, good thermal-chemical stability and have the potential to be excellent candidates of high quality white LEDs in solid state lighting applications. Other phosphors such as sulfides- and thiogallates-based normally show insufficient stability at high humidity and temperate.

Tab.1 Representative phosphors for MPB LEDs

phosphor composition	emission color
SrSiON:Eu2+	yellow-green
(Ca,Sr,Ba)5(PO4)Cl:Eu2+, Mn2+	yellow-orange
Sr2Ga2S4:Eu2+	Green
SrAl2O4:Eu2+	Green
Sr2P2O7:Eu2+, Mn2+	yellow-green
(Y,Gb,Tb)3(Al,Ga)5O12:Ce3+	yellow-green-orange

Another MPB configuration is based on near-UV LEDs [59-61]. Through a coating blend of blue, green and red phosphors on a chip (in some cases, orange phosphor is added in blend), this configuration applies near-UV LED to pump blend and can excite a perfect white light spectrum. This approach can also satisfy the requirements of low CCT and high CRI for white LEDs. In addition, the maximum LE is estimated to be approximately 300lm/W by theoretical calculation [62].

The benefits of MPB approach are obvious, but the disadvantages are also significant. Due to the essential defect of phosphors, energy loss caused by the Stokes shift is inevitable. The addition of red phosphor means that the actual LE is lower than 70lm/W for blue pumped white LEDs and 50lm/W for near-UV pumped LEDs. In addition, the insufficient conversion of UV light will lead to its leakage and harm human eyes. Nevertheless, the performance levels of MPB LEDs have far exceeded incandescent (17lm/W) and halogen (25lm/W) lamps [55] and are expected to be comparable to fluorescent lamps with further improvements in the QE and spectrum of phosphors.

The major challenge for color control is keeping the color of LEDs stable in manufacturing and usage. In SPB and MPB approaches, a small variation of thickness and concentration can induce a remarkable change of CCT and fluctuation of CRI. A normal range of CCT for blue chip pumped LEDs is±500K for cool white and±250K for warm white. In the worst case, CCT can be changed from 4000 to 10000K while CRI ranges from 80 to 60. In freely dispersed coating and remote coating, the deposition of phosphor particles in embedding encapsulants will generate a locally inhomogeneous distribution of concentration. High temperature and current in usage can cause a wavelength shift and decay of conversion efficiency. Keeping the stability of color in MPB LEDs is more difficult than that in SPB LEDs. This is because different phosphors will exhibit various deposition rates in dispersing and decay mechanisms in usage. Stacking phosphor particles on a chip without pre-added encapsulants such as conformal coating and self-assembly particles array [63] can solve the deposition issue. To increase the stability of phosphors, besides the development of novel materials, coating nano-micro particles on the surfaces of phosphors is believed to enable resistance to higher temperature and humidity [56,64].

4 Thermal management

Thermal dissipation has been a serious issue with the invention of high-power LEDs. Constrained by internal and external quantum efficiencies, a non-radiative process in active layer converts most of electrical power to heat. Increased drive current ensures that there is almost 70W/cm² for a lW LED with 1mm² areas, which is higher than that of the conventional microprocessor chip. Generated heat will increase the junction temperature significantly. Higher temperature may damage the PN junction, lower luminous efficiency, increase forward voltage, cause a wavelength shift, reduce lifetime and affect the quantum efficiency of phosphor [65]. Degradation of materials is mostly caused by long-term heating. Elevated temperature can induce thermal stresses in packaging components due to the mismatch of coefficient of thermal expansion (CTE). Since thickness of the active layer and P-GaN of a chip is only dozens of nanometers, they are very sensitive to thermal stress. Low stress may induce significant deformation. For most commercial LEDs, junction temperature cannot exceed 120°C. High thermal stress caused by an overheated LED may leads to cracks, delaminations and premature failures. Therefore, rapidly removing heat from the chip and keeping junction temperature below a certain limit is crucial for the maintenance of LED performance.

There are two paths for heat dissipation. One is by conducting heat through upper phosphors and encapsulants, while the other is conducting heat through the chip-attached materials. Since encapsulants are polymer and both encapsulants and phosphors are heat insulated, all of the heat must be conducted through the materials beneath the chip. Considering the hyper heat flux density of the chip, these materials should not only present high thermal conduction, but also spread the heat to circumstances rapidly by effective configurations.

In 1998, Lumileds developed the first high-power LED packaging - Luxeon, which embeds a metal slug with large volume for heat dissipation. This lead frame-based plastic (LFP) package has become the main packaging type adopted by many corporations such as Osram and Seoul Semicon. This packaging method reduces thermal resistance to 4-10K/W and can dissipate chip power up to 5W [14]. In 2006, with the improvement of base materials and attach technologies, the Luxeon K2 package can allow junction temperature up to 150°C for white LED with a driven current up to 1.5A [55]. Figure 10 shows the thermal resistance network for a completely Luxeon LED system. Such a network is generally utilized to evaluate the performance of heat dissipation. System resistance R_system is the sum of all resistances:

$$R_{\mathrm{system}}=R_{\mathrm{chip}}+R_{\mathrm{chip-sub}}+\cdots +R_{\mathrm{heatsink-envir}}.$$

Fig.10 Thermal resistance network of Luxeon LED (there are at least four interface resistances. These interfaces are bottlenecks of heat conduction and should be paid special attention)

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Low system thermal resistance implies that heat can be rapidly conducted to the environment and thereby reduces the temperature difference between junction and environment.

Instead of a separate heat slug or lead frame assembly packaging as shown in Fig. 10, another approach for the packaging solution of high power LEDs is chip-on-board (CoB) technology. In this case, the chip is directly mounted on the board having the metal circuit. Therefore, size of CoB can be more compact. Figure 11 is the thermal resistance network of CoB. Since diminishing the heat slug reduces one interface and one bulk material, R_system of CoB can be lower than that of LFP, and heat can be more efficiently conducted to the heat sink. Another advantage of CoB is that the packaging density can be significantly higher with hundreds or thousands of chips packaged in one board [66]. Increased lumen output in the unit packaging area decreases manufacturing cost since less packaging materials are needed. The main constraints are light intensity control of a large surface light source and thermal dissipation because of high density of heat flux.

Fig.11 Thermal resistance network of CoB (the total thickness of CoB is significantly thinner than that of Luxeon, therefore, the system resistance of CoB is believed to be lower than that of Luxeon)

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In LED packaging, there are generally two approaches for heat transfer: heat conduction and heat convection. Thermal resistance R_cond for heat conduction is

(3)$$R_{\mathrm{cond}}={\displaystyle \frac{\delta }{{\lambda }_{\mathrm{conduction}}A}}.$$

thermal resistance R_conv for heat convection is

$$R_{\mathrm{conv}}={\displaystyle \frac{\mathrm{1}}{{\alpha }_{\mathrm{convection}}A}}.$$

where, δ and A are thickness and surface area of materials; λ_conduction is thermal conductivity, which is determined by physical properties of materials; and α_convection is surface coefficient of heat transfer, which is determined by physical properties, configurations and shape of materials, and conditions of circumstance.

In the resistance networks of Luxeon and CoB, excluding R_{heatsink-envir} and R_sink-envir belong to R_conv, all other resistances belong to R_cond. Therefore, thermal management of LED packaging mainly depends on heat conduction of materials. From Eq. (3), R_cond of each packaging element can be reduced by applying high λ_conduction materials, increasing contact area A and reducing thickness δ. However, considering the issues of cost, size, strength and reliability, thermal management of LED packaging is not a simple assembly of various advanced materials with the maximum area and minimum thickness. High λ_conduction means high cost, minimization of package restricts the potential area, and mechanical strength and reliability demands adequately thick materials. Therefore, material selection and dimensions of each packaging component should be given specific treatment.

The chip is normally mounted on the metal heat slug in LFP or substrate with copper circuit in CoB, because of the high thermal conductivity of metal. However, there is a large CTE mismatch between the metal slug/circuit and GaN chip, which may generate seriously thermal stress [67]. Therefore, it is essential to add a submount between the chip and slug/circuit to relieve the stress by compensating the CTE mismatch. Silicon is considered a suitable choice because it has a similar CTE and can integrate a wide variety electronics [14]. However, if the GaN chip has been lifted off from sapphire and bonded on Si, the submount is not necessary for die attaching.

Die-attach materials between the chip and submount should be carefully selected [68]. Expected materials should present excellent adhesion between the bonded surfaces, good stress relaxation at the interface, and effective heat dissipation. Eutectic solder is considered a suitable choice. Au₂₀Sn₈₀ eutectic alloy is one of the most frequently used lead-free solders with superior thermal properties (60W/mK). However, this alloy is sensitive to the composition and shows poor reflow behavior [69,70]. Perfect die bonding is important for heat conduction. It has been found that the thermal resistance of die solder constitutes a large portion of system resistance. Defects such as pores and intermetallic compounds (IMC) in the bonding layer will increase the junction temperature dramatically, leading to premature failure of LEDs [71,72]. Figure 12 shows the temperature variation across the surface of a defected chip [71]. Therefore, process parameters of eutectic soldering should be precisely controlled to avoid defective LEDs.

Fig.12 Temperature distribution for a defected LED chip (the variation of temperature exceeds 40°C)

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In lead frame packaging, the choices for heat slug materials are limited for industrial applications in terms of cost and reliability. Copper is the most frequently used material. Increasing the volume of the heat slug is the generally adopted approach to enhance heat dissipation, which will increase the size of package and induce a higher cost. CoB can provide more flexible and powerful solutions for heat removal by maintaining compact size [73]. Figure 13 displays six configurations of CoB technologies that have been developed and applied in products. By changing the structures and materials of the board, thermal performance of CoB can satisfy various requirements on cost.

Fig.13 Schematic diagram for six configurations of CoB technologies (chips in all examples are all vertical electrode chips)

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The board in Fig. 13(a) is called metal core printed circuit board (MCPCB) [74]. Aluminum, which is a low cost material, is normally utilized as the metal core with typical thermal conductivity of 160W/mK. However, constrained by the low thermal conductivity (2-10W/mK) of dielectric layer, it is estimated that total thermal resistance may be as high as 50K/W [75]. Substituting the dielectric layer with thin alumina film can lower the thermal resistance to approximately 35K/W [76]. Another alternative for metal core board is removing the dielectric layer and soldering the chip directly on the substrate, as shown in Fig. 13(b). The benefit for this method is that heat can be more efficiently dissipated through the metal substrate. However, for electrical design considerations, an electrical active metal base may generate reliability issues [75]. This electrified substrate may make the heat sink a charged body and easily damaged by electrostatic shock. In a multi-chip package, parallel connection of chips will induce a rather high current in the metal substrate and generate remarkable heat. This method is believed to be suitable for parallel electrode chips. But the mismatch of CTE between chip and substrate may induce high thermal stress and rapid decay of performance.

Compared to the overmolded lead frames in LFP and metal core-based boards, ceramic materials are considered more suitable for high-power LED packaging. Table 2 lists the thermal properties of ceramic, metal, composites and other materials for comparison. Ceramic substrate has advantages in terms of compact size, surface mountability, endurance at high temperature and UV radiation, and long-term thermal-mechanical stability. With the capability of forming multi-layer circuits, ceramic substrate can fabricate the reflecting cavity, signal via interconnections and integrate various electronics. Due to the low CTE, thermal stress between chip and ceramic board is also reduced and reliability is improved.

Tab.2 Thermal properties of materials

materials	thermal conductivity/(W·mK-1)	CTE/(10-6K-1)
Cu	398	16.5
GaN	130	3.2
Sapphire	35-40	5.8
SiC	90-160	4.5
AlN	175	4.5
AlSiC	200	7.4
Si	148	4.0
Al	160	23.6
Al2O3	27	6.9
LTCC	3	5.8
Au	318	14.1
Ag	429	19.1
CuMo	165	6.6
CuW	175	6.8
Cu/diamond	600	5.8

The board in Fig. 13(c) is a thick film ceramic substrate. Anode and cathode are routed to the back of the substrate by metallized via. Ceramic substrate itself is utilized for thermal dissipation. Al₂O₃ ceramics is preferable for low cost industrial requirements, the typical conductivity of which is 27W/mK. Other ceramics such as aluminum nitride [77] and beryllium oxide (BeO) with high thermal conductivities are not suitable for LED packaging due to cost. Aluminum silicon carbide (AlSiC) is evaluated as a potential ceramic substrate for LED because it can provide high thermal conductivity, compatible CTE with Si, and high strength and stiffness compared to Cu and Al [78]. The cost of AlSiC is also in an acceptable range.

However, compared to metal substrate, the thermal conductivity of ceramic is obviously lower, which restricts the development of ceramic-based CoB. A modified method is fabricating a large scale metal via beneath the LED chip [79] as shown in Fig. 13(d). Silver is the most favorable material for fabricating metal vias. Thermal conductivity can be improved to more than 200W/mK, while thermal resistance can be reduced to 8.5K/W [80-82]. This method is very flexible since the metal via array can be fabricated to be multi-layers with different radius, number and height. This indicates that the structure of the substrate can be optimized to provide desired thermal conductivity and mechanical strength. However, the process cost of this method is rather high due to the precise printing of metal paste with large volume and rigorous sintering process by maneuvering temperature control. Otherwise, shrinkage mismatch between ceramic and metal vias will cause cracks.

Direct bonded copper (DBC) in Fig. 13(e) provides another competitive approach to further improve thermal dissipation of ceramic-based CoB. In Figs. 13(c) and 13(d), metal paste is the blend of metal particles, silicate glass and other organic materials. In the sintering process, melted metal particles float upward and form the metal circuit. Glass and other materials will sink down to the surface of ceramic substrate, react and form a compound layer as the bonding agent of circuit and ceramics. This compound interface increases the total thermal resistance of the board. DBC bonds copper circuit to ceramic by high temperature eutectic fusing without adding heat-insulated compounds as the bonding agent. Therefore, there is no identifiable interface between copper and ceramic. Additionally, this eutectic bonding layer constrains the expansion of copper and thereby lowers the total CTE of the board. Since the copper layer in DBC is pure copper and not a blend of metal paste, DBC can present higher thermal conductivity than that in Figs. 13(c) and 13(d). In addition, controllable thickness of copper layer provides a competitive solution of thermal management. The disadvantage of DBC is that it cannot fabricate metallized vias through ceramic substrate, which indicates that the DBC board cannot be applied to surface mounting.

Since ceramic is capable of forming multi-layer substrate, embedding lead frame with large metal slug in ceramic substrate as shown in Fig. 13(f) is becoming the packaging solution with most potential and low cost for high power LEDs. The metal slug beneath the chip can maximize conducted heat and rapidly spread heat to the whole board. Electrical interconnections between ceramic layers are routed to the back of the board by metallized vias. Therefore, both the thermal dissipation and electrical insulation are easily solved. This method is totally compatible with integrated circuit (IC) processes and eliminates cost as a serious issue. Additionally, multi-layer ceramics can integrate electronic devices such as driver, sensor and controller to increase the density of system integration and provide more functions in one package. Reliability of the total system is also improved since these devices are well protected by ceramics. This packaging type is known as system in packaging (SiP), which is believed to be the final target of LED packaging and can reduce cost significantly due to its minimum dimensions. The difficulties for this method are fabricating reflectors and special fixtures for lenses. Shrinkage of ceramics in the sintering process produces coarse reflectors and deformed fixtures, which affects optical performance.

Besides adopting various structures to improve the total performance of heat conduction, much efforts are put into research to develop advanced substrate materials. These materials are normally composite materials such as AlSiC. Representative methods for obtaining advanced composite materials include monolithic carbonaceous materials (MCMs), metal matrix composites (MMCs), carbon/carbon composites (CCCs) and ceramic matrix composites (CMCs) [83,84]. These materials present controllable CTE and remarkable thermal conductivity.

Another alternative to lower the thermal resistance of substrate is reducing the thickness of substrate. Kim et al. developed a competitive aluminum-based packaging platform by selectively anodizing Al substrate [85]. The thickness of the overall package is only 500μm and the Al base for chip attaching is 180μm. Thermal resistance was reduce to approximately 2K/W [86], which is a significant advancement for today’s LED packaging. However, a thinner substrate may be fragile to thermal stress and operations such as wire bonding. Therefore, mechanical reliability must be seriously considered.

The final factors affecting system thermal resistance are the interfaces among submount, heat slug/board, and heat sink. Since these components may warp under heating and the surfaces are rough, there exist small gaps between two components. Thermal interface materials (TIMs) are essential to fill these gaps to increase thermal conduction. TIMs should be soft and wettable to avoid residual air bubbles in the interfaces. For conventional processes, silver paste is preferred as TIMs between submount and heat slug/board to address cost and rapid manufacturing goals. However, silver paste presents low thermal conduction and poor adhesion strength. Applying solders to bond submount and heat slug/board is becoming the trend of high power LED packaging. Because of the restrictions of ROHS, lead-free solders such as SnAgCu alloys are the most utilized materials for soldering. To reduce the cost of solders, reducing thickness to a few micrometers is necessary.

Since the area between heat slug/substrate and heat sink is very large to maximize the spreading rate of heat, TIMs in this interface cannot be expensive. Thermally conductive epoxies are thus the most favorable materials. Although λ_conduction of these epoxies are only 2-5W/mK, their cheap price makes them very competitive. Liquid morphology of these epoxies indicates that the thickness can be extremely thin. However, to make conductive particles in the epoxies uniformly distributed in the interface, precise dispensing and an optimized curing process are important while maintaining a thin film.

It should be noted that contact resistance presents more significant impacts than bulk resistance of epoxies on the total interface resistance. This is mainly due to the poor adhesion of epoxies and contact surfaces. Adding aligned carbon nanotubes (CNTs) to TIMs may improve the thermal conduction between contact surfaces [87,88]. High density of CNTs is necessary to provide enough opportunities for heat conduction by CNTs. However, compared to the ultrahigh thermal conductivity of CNT itself, the effects are not as significant as expected. This is due to the fact that the small size of CNT leads to many interfaces among CNTs and thereby blocks heat conduction. Further improvements on the alignment, straight morphology and bonding strength of CNTs when the density is extremely high are needed.

For single-chip-package and low power multi-chip-package, thermal dissipation must rely primarily on natural conversion cooling by considering low cost and high reliability. However, there can be tens or hundreds of chips integrated in one package in some specific applications such as airport illumination and plaza lighting. This demands a semi-active cooling or active cooling system integrated to the package [89]. It has been found that micro-jet cooling method can dissipate heat effectively [90-93]. Based on this technology, we designed the 220W and 1.5kW integrated LED light source with CoB package.

5 Reliability

Since the first high power white LED was invented, significant efforts have been put into the study to fabricate high reliability LEDs with lifetime as long as 0.5×10⁵-1×10⁵h. Although white LEDs have presented longer life than traditional lamps, the relatively higher cost and requirements on environmental protection and energy saving propose more rigorous expectations on reliability. However, the influencing mechanisms of manufacturing and operation on the reliability are not substantially understood. This restricts the development of LEDs since we cannot predict the lifetime and failure of LED devices accurately. Unexpected failure may induce serious impacts. A representative incident was the Luxeon recall of Lumileds, which was caused by non-conforming epoxy material [94]. Potential issues affecting the reliability mainly include deformation, voids, delamination, cracks, impurities, moisture, temperature and current. These issues are generally attributed to improper choice of materials [95], incorrect handling and processes, non-optimized structures, excessive usage under harsh conditions and other factors.

In the manufacturing process, voids normally exist in die attach materials and thermal interface materials. This is because these materials are extremely thin and impurities from the interfaces may contaminate them. Thickness is only a few micrometers. In the soldering and curing process, complicated physical and chemical reaction will happen and may release gas or vapor. In the annealing process, melted materials should cool down and shrink. Different composite alloys have various shrinkage rates and generate internal stress in materials. This induces the initial crack and voids as shown in Fig. 14 [70]. These small voids can block thermal conduction. In the following thermal cycles such as encapsulant curing and operations, the voids and initial crack may expand and result in breaks and delamination in the die attach interface.

Fig.14 SEM images for die attach materials (small voids and initial cracks are inevitable in the curing process)

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Most of encapsulant materials in high power LED packaging are silicones. Cured modulus of silicones can be adjusted by changing the crosslink density and the ratio of linear to branched silicon species as shown in Fig. 15. Hard resins and elastomers are preferred for the molding and fabrication of optical lenses, whereas soft gels are used for encapsulating stress-sensitive regions such as wire-bonds. The nonlinear viscoelasticity of silicones shows that stress can be relieved slowly by deformation of silicones. However, in the curing process, the elastic deformation and recovery of silicones will generate internal stress and concentrate the stress on partial areas of the interfaces due to different modulus and shrinking rates of encapsulants. Constrained by the adhesion strength and affected by the impurities, an initial crack will emerge when the concentrated stress cannot be relieved. In the usage of LEDs, the initial crack will grow and expand to delamination when heat or force is loaded. The operating and storage temperatures can also increase the failure probability since the modulus of silicones is sensitive to temperature. At very cold temperatures, encapsulants will become hard and brittle and thus cannot resist shocks. At very high temperatures, encapsulants will expand and soften. This causes significant deformation under shocks, induces large mechanical strain on gold wire and lead to premature failure.

Fig.15 Constitution of silicon materials (increasing the ratio of R branches can decrease the modulus of silicones)

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Most silicone materials are two components cured. Therefore, silicones should be mixed homogeneously until fully vulcanized. Fabrication of phosphor silicone also requires mixing phosphor particles homogeneously with silicone. The stirring process will introduce bubbles and moisture in mixture. Deaeration can extract most visible bubbles from the mixture, but very small bubbles cannot escape due to the high viscosity of silicones. In the curing process, these bubbles will expand by heat and flow to the top of the lens. Gathered bubbles can generate bigger bubbles and results in the phenomenon shown in Fig. 16(a). In some cases, these small bubbles may attach to the surface of the board. When LED is heated, moisture will permeate these bubbles and increase their volume. Expanded bubbles can weaken the adhesion strength in the interfaces and thereby result in the penetration of more air. These bubbles can reduce the lumen output greatly as shown in Fig. 16(b) and be the initial factors causing failures.

Fig.16 Reliability issues caused by bubbles. (a) Three cases of bubbles of silicone encapsulants; (b) effects of bubbles on light extraction

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One disadvantage for current used plastic packages such as Luxeon K2 is moisture diffusion. Plastic has higher moisture absorption rate than other materials such as silicone, ceramic and metal. Moisture concentration in packaging materials will increase gradually with the usage of LEDs. Mismatch for moisture expansion coefficients of packaging components can induce hygromechanical stress. This stress can reduce the interfacial adhesion strength and leads to delamination in the reflowing solder, curing processes and harsh usage [67,96]. Figure 17 shows typical delaminations between plastic and lead frame. Absorbed moisture can also accelerate the electro-chemical reaction by providing hydrogen and oxygen ions. Impurities and ions in encapsulants can erode metal materials such as Au, Ag and Cu slowly, which may damage the electrodes of chip and gold wire.

Fig.17 Delaminations in plastic packages of Luxeon

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Thermal load is the primary factor affecting the lifetime of LEDs in usage. Heat accelerates the moisture absorption rate of materials and speeds up the erosion reactions of impurities and metals. Cracks and delaminations will extend and lead to shedding of components under thermal cycles. Generally, heat is coupled with driven current. Increasing current generates more heat and induces worse electrical stress and thermal stress. This coupling effects of heat and current on the reliability of LEDs have been studied by many experiments [97-104]. The main impacts of high current and elevated temperature include increasing thermal resistance and forward voltage, reduction of thermal conductivity and transmittance of silicones and QE of phosphors, carbonization of packaging components and phosphors, wavelength shift of chip and phosphors, current crowding, and material degradation. It is believed that pulsed current with high duty cycles is beneficial for the improvement of reliability instead of direct current. Operating current of LEDs should be carefully set to avoid over-loaded electrical and thermal stresses according to different environments.

Since the LED packages should be subjected to mechanical, thermal and environmental loadings during manufacturing processes and services, adhesion strength in the interfaces should be given special attention to maintain LEDs in a safe state. It has been proven that weak adhesion strength makes the delamination expand faster and prevents resistance to multi-shocks. Preconditioning can improve adhesion strength, but the materials should be carefully chosen to avoid penetration of impurities and harmful ions.

It should be noted that reliability issues cannot be permanently solved. The only solution is minimizing the probabilities of failures by keeping decays of components within acceptable ranges. For a long time, structures of LED packaging have been designed for easy operations, simplified processes and reduced cost. However, this induces adverse influences of LEDs since people find that the performance is not as stable as declared. Typical cases are failures of road lamps in China. Therefore, it is believed that applying advanced technologies with a small increase of cost to improve reliability is essential for the future of LEDs.

6 Cost

It is not an easy process of addition and subtraction to cut down the cost of LEDs. Many factors restrict the reduction of cost. Performance is the main consideration. In Sects. 2, 3, 4 and 5, relationships between cost and performance have been discussed in detail. Therefore, this section is only a summary and introduction of the promising approaches for the reduction of cost.

Cost is the premise for the view that white LEDs can penetrate the general illumination market and finally substitute traditional lamps. It is estimated that 60%-70% of cost for one LED is attributed to chip cost, that of packaging materials is in the range of 20%-30%, and manufacturing cost is approximately 5%-10%. Since chip cost is dominated by wafer size and chip manufacturing, efforts to lower packaging cost should focus on the reduction of the amount of packaging materials and mass production to decrease the cost ratio of equipment to the sale price of LEDs.

CoB provides the most promising technology. This technology can make the size of the LED module as small as possible. As Fig. 18 shows, the development of CoB based on ceramic substrate has significantly reduced the size of LEDs. The latest product from Cree has minimized the package size to 3.45mm×3.45mm. Therefore, less packaging materials are needed for a more compact LED. Reduction of cost provides wider selection of advanced materials. This will further improve the performance and cut down lumen cost.

Fig.18 Development of LED packaging size

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Mass production is a key step for LEDs to reduce the final cost and facilitate the consistency and repeatability of products. The variations of performance have induced a remarkable reduction of yield rate. This actually raises the total cost, since the cost loss caused by material waste and equipments usage of defective products should be counted in the sale price of other working LEDs. The variations are normally due to the lack of standard and rigorous process steps and non-optimized packaging design. Materials selection is also important.

Although wafer level packaging (WLP) is impractical for current manufacturing, it has the most potential as technology for future LED packaging. WLP can minimize the size of package and realize mass production with the least manufacturing time. There are generally two methods for WLP: one based on silicon wafer [105,106], and the other based on GaN wafer [19]. WLP can easily control the process parameters with the same level for all chips. Therefore, the consistency of products can be guaranteed. For Si-based WLP, various electronics can be integrated to the Si wafer and realize SiP and three-dimensional (3D) packaging through silicon via, which can further increase the competitiveness of LEDs in terms of cost.

7 Prospect

Similar to Moore’s Law of IC packaging, there is also Haitz’s law for LED packaging as shown in Fig. 19 [107]. The lumen flux per package has increased 20 fold each decade in the past thirty years, whereas the cost has decreased ten fold each decade. However, since the emergence of high power white LEDs, Haitz’s law has been surpassed. Lumen output of white LEDs has increased 30 fold from 1998 to 2007. Lamps such as MR16 can offer higher luminous flux than 1000lm by CoB technology. However, we find that the increasing rate is slowing down. Packaging technologies developed from 1998 are facing more difficulties to create new milestones in performance and cost. Nevertheless, it is believed that these barriers can be overcome by the following prospective technologies.

Fig.19 Haitz’s law (orange line and dark cyan line) in the past forty years and prospects of lumen (purple line) and cost for white LED since 2000 (red square: lumen of red LED; green triangle: cost of red LED; blue square: lumen of white LED; pink triangle: cost of white LED)

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First, size of GaN wafer will be increased from 2 to 6 or 8 inches in 5-10 years. A 2-inch wafer can manufacture approximately 1.8×10³ 1mm×1mm chips, whereas the number is 1.7×10⁴ in a 6-inch wafer. Therefore, future chip cost may be cut down to 10% of present cost. This indicates that the biggest obstacle for the efforts to reduce the cost of one white LED package can be solved. On the other hand, the markets for high power LEDs are developing fast, which means the amount of packaging materials are increasing rapidly. This results in significant reduction in the cost of packaging materials.

Second, opto-thermal stabilities of phosphors and encapsulants can be improved. New scalable synthesis techniques such as spray pyrolysis can produce much finer particles by precisely controlling particle composition, morphology and size distribution [12]. These techniques can also reduce the probabilities of defects and impurities in phosphors caused by milling and post-processing. Other techniques such as nano phosphors developed by wet chemical processes can minimize redundantly optical scattering and thereby increase light extraction. These novel phosphors present better thermal stabilities and can withstand temperatures as high as 200°C. In encapsulant materials, silicones can improve the thermal stability by adjusting compositions such as adding additives. These additives will increase the glass-transition temperatures of silicones. It is perceived that glass materials present better optical and thermal stabilities than silicones. Therefore, applying glass to fabricate lenses will provide better reliability and light output.

The phosphor layer in conformal coatings is rather thin and can be easily damaged. Developing a pre-fabricated phosphor layer and then coating it on the chip may present better mechanical reliability. Approaches include Lumiramic technology invented by Lumileds [108], glass-ceramic phosphor [109,110] and thin film of pre-cured phosphor silicone (TFP) studied by our research group. Lumiramic and glass-ceramic techniques embed phosphor particles in transparent ceramics. Another benefit of these approaches is that the color of LEDs can be precisely adjusted in manufacturing by exchanging different phosphor slices with various thicknesses and concentrations. The color will not change after curing of encapsulants, which is impossible for current processes.

Developing fast curing silicones at low temperature or photosensitive silicones are helpful for shortening manufacturing time. Low temperature and non-thermal curing reduces the thermal effects on materials and thereby improves the initial performance of LEDs. Photosensitive silicones can even realize the fabrication of self-focused lens without molds [111,112], which could reduce charges for the latter.

It is perceived that future thermal management of a single chip package will not be as serious as current ones. This is because the extraction efficiency of a chip can be increased to 60%-70% by applying techniques such as surface roughening, photonic crystals, and patterned substrates. Only 30% heat from the chip should be dissipated, which is twofold lower than present heat flux. However, it is believed that multi-chip and large-chip packages will develop rapidly in the future to increase light output in the unit area. Fabricating substrates with micro-structures such as textured copper networks and integrating semiactive cooling systems such as micro-vapor chamber in CoB will be suitable solutions for these novel hyper high-power LED packages.

The development of multi-chip and large-chip packages needs more rigorous requirements on light control. An enlarged surface of light source and restrictions of package size require a new method for optical design. A hemispherical lens or simple plane surface cannot fulfill demands on high light extraction and color control. Suggested methods include micro-lens array and free form lens [113-117]. The main benefit of free form lens is light flux can be redistributed to meet specific requirements of different applications. Since free form lens is thicker than lens in a minimized single chip package, higher transparency of lens materials is essential to reduce the energy loss caused by material absorption. Applied materials such as silicone resins should maintain transmittance higher than 90% through a 5mm layer.

8 Conclusion

The status and prospect of high-power white LED packaging have been presented. Phosphor plays an important role in light extraction and color control. Conformal coating is a suitable approach of fabricating phosphor layer for current packages. However, Lumiramic and TFP techniques are considered to present better optical, thermal and mechanical reliabilities than conformal coating. QE and Stokes shift of phosphor can induce significant lumen loss. High RI silicones can extract more light from the chip and reduce material absorption due to high transmittance. The optimal design of silicone lens is important for light extraction and minimization of package size. Micro-lens array and free form lens are perceived to be suitable for future LED packaging. To manipulate the color of LED in the desired range, applying the MPB approach to improve CCT and CRI control is necessary. However, localized heating caused by the chip should be given enough attention since the temperature may be higher than 120°C. Therefore, developing novel phosphors to be stable at 200°C is essential for future hyper high-power LEDs. Heat is one of the most important issues of LED packaging. Many novel packaging configurations such as Luxeon and CoB are proposed to address thermal dissipation. The key component for the improvement of heat conduction is the substrate in CoB. A multi-layer ceramic substrate is considered to be the most potential-filled choice. Other materials, especially TIMs, also play important roles in the reduction of system resistance. The emergence of multi-chip and large-chip packages requires rigorous demands on the cooling system. Semiactive or active cooling such as microjet cooling is necessary for thermal management. Material selection should be careful to avoid a serious mismatch of CTE. Voids in die attach materials and bubbles in silicones can decay the lumen output and lead to premature failures. Significant loads of heat, moisture and current can induce serious stresses and accelerate degradation of materials. Fast curing silicones at low temperature and photosensitive silicones can eliminate the initial defects caused by thermal cycles. To reduce the cost, developing CoB, SiP, 3D packaging and WLP technologies are necessary to minimize the size of package. It is perceived that the package cost will be significantly reduced with the increase of wafer size and maturity of the LED markets. Therefore, the performance cost of LED packaging can still surpass Haitz’s law.

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Acknowledgements

This work was supported by the National Natural Science Foundation of China (Grant No. 61675176), the Natural Science Foundation of Hebei Province (No. F2014203125), the Science and Technology Support Program of Hebei Province (Nos. 15273304D and 14273301D), and the “XinRuiGongCheng” Talent Project of Yanshan University.

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