Quantitative analysis of the transition conditions for the excess noise component of nano-MOSFETs

Abstract

In nanoscale metal-oxide-semiconductor field-effect transistors (MOSFETs), excess noise has been experimentally observed as the channel length is scaled down. Theoretical analyses indicate that as the channel length decreases, the dominant component of excess noise gradually changes from modified thermal noise to suppressed shot noise. However, no clear quantitative analysis has been provided regarding the specific conditions for this transition. In this paper, based on a device current model, we analyze the transition conditions under which shot noise replaces thermal noise as the dominant component of excess noise. In the modeling process, we comprehensively consider short-channel effects, including the electric field distribution, mobility reduction caused by electron temperature gradients, and the hot-carrier effect. Meanwhile, we use 3D Monte Carlo simulations to analyze the channel current noise components in MOSFETs with different channel lengths, and we simulate the effects of drain–source voltage, gate voltage, temperature, and substrate doping density on the transition of excess noise components. The simulation results show that the transition trend of excess noise components is consistent with predictions from the physical model: the critical channel length for the transition from thermal noise to shot noise in nanoscale MOSFETs is approximately 20 nm. The model and simulation results presented in this paper agree with reported experimental measurements and provide a theoretical foundation for the quantitative analysis of excess noise components in nanoscale MOSFETs.

Graphical abstract

Keywords

excess noise / thermal noise / shot noise / Monte Carlo simulation / backscattering

1 Introduction

Transistors, as the core components of chips, have smaller gate sizes to achieve higher integration and enhanced performance [1, 2]. With the continuous advancement of semiconductor fabrication processes [3, 4], nano-MOSFETs exhibit excellent low-power characteristics and high unit-gain frequency advantages [5]. However, when the channel length of MOSFET devices is reduced to the nanoscale, the short-channel and parasitic effects of the devices are significantly enhanced, leading to significant excess noise observed in experimental measurements [6]. This not only reduces the efficiency of the devices but also adversely affects their lifetime [7, 8]. An in-depth understanding of noise characteristics, especially the physical sources of excess noise, is a prerequisite for applying CMOS technology to low-noise RF designs [9]. Regarding the generation mechanism of excess noise, researchers initially attributed it to excess thermal noise and modified the traditional thermal noise model by introducing short channel effects such as hot carrier effect, mobility reduction effect, and channel length modulation effect. However, the modified thermal noise model still cannot reasonably explain the excess noise phenomenon in nanoscale devices when the device channel length is less than 100 nm [10, 11]. Subsequently, experimental measurements have shown that the channel current noise in nanoscale MOSFET devices exhibits shot noise characteristics [7, 12], suggesting that as the channel length of nanoscale MOSFET devices continues to shrink, shot noise will overtake thermal noise as the main component of the excess noise [13]. Therefore, it is necessary to investigate the transition conditions of the excess noise component of nano-MOSFET devices.

Shot noise originates from the randomness of charge carriers crossing potential barriers. In the channel of nano-MOSFETs, the potential barrier is typically located near the source region. Charge carriers from the source randomly cross this barrier and are injected into the channel, which serves as the primary source of shot noise [6]. Meanwhile, whether the carriers injected into the channel can reach the drain region depends on the scattering effects within the channel, whereas the presence of channel resistance leads to the generation of thermal noise [14, 15]. As the channel length decreases, the carrier transport mechanism in nano-MOSFET devices undergoes a significant transformation, gradually shifting from traditional drift-diffusion transport to ballistic or quasi-ballistic transport. This transition in transport mechanism directly affects the components of excess noise in the device [7, 16, 17]. In long-channel devices, the channel resistance is relatively high, and carriers undergo significant scattering during transport. These scattering effects strongly suppress shot noise, making thermal noise the dominant noise source [18]. Therefore, the noise in long-channel devices is typically dominated by thermal noise [19, 20]. However, as the channel length decreases, the influence of the potential barrier on the channel current gradually exceeds that of the channel resistance. The dominant mechanism of the channel current shifts from resistance-limited to barrier-limited, and the effect of the barrier becomes increasingly significant. This transition leads to a gradual shift in the device noise from thermal noise to shot noise [21, 22].

Regarding the transition in the excess noise components of the channel in nano-scale MOSFET devices, existing studies have conducted related physical modeling work. However, these studies are mainly limited to qualitative descriptions and lack quantitative analysis. Moreover, they have not fully considered the various short-channel effects induced by the reduction in device dimensions [23]. Additionally, some studies have predicted the transition conditions of excess noise components in nano-MOSFET devices based on experimental measurements, but they similarly have not established specific quantitative analytical models [6, 24]. The McKelvey flux method can capture the fundamental phenomena of carrier transport in transistors, effectively encompassing the transition from diffusion to ballistic transport [25, 26]. Therefore, in this study, the McKelvey flux method, combined with short-channel effects, is employed to establish a model for the transition of excess noise components in small-sized, nanoscale-channel-length MOSFET devices. The conditions for the transition from thermal noise to shot noise are analyzed in detail. Additionally, a three-dimensional Monte Carlo simulation [27−29] is employed to validate the channel current noise of MOSFET devices with different channel lengths. The power spectral densities of various noise parameters, including channel current noise, total shot noise, and thermal noise, are extracted from the simulation output of current fluctuations. The variations of the excess channel noise components with respect to gate voltage, drain-source voltage, substrate doping density, and temperature are further calculated and analyzed. The trend of excess noise transition in the Monte Carlo simulation results shows good consistency with the theoretical analysis. These findings provide important references for device reliability analysis and characterization.

2 Transformation model

The McKelvey flux method [25] decomposes the current into forward and reverse directional fluxes. Figure 1 shows the directional fluxes of the MOSFET. F^{+}\left(0\right) represents the forward flux injected from the source. F^{-}\left(0\right) represents the negative carrier flux under scattering conditions, which consists of two components: the first component is the reverse scattering part of the flux injected from the source into the channel, and the second component is the negative carrier current flowing from the drain region to the source. The drain-injected flux is represented in Fig. 1 as F_B^{-}(0).

Based on the directional carrier flux, the drain-source current can be expressed as

(1)I_{\mathrm{D}\mathrm{S}}=Wq\left[F^{+}\left(0\right)-F^{-}(0)\right],

where W is the device width. The backscattering coefficient r is introduced to describe F^{-}(0). The backscattering coefficient r is defined as the ratio of the number of carriers scattered back into the injection region to the number of carriers injected [30, 31]. Based on the backscattering coefficient r, F^{-}(0) can be expressed as

(2)F^{-}\left(0\right)=r{F}^{+}\left(0\right)+\left(1-r\right)F_B^{-}\left(0\right),

(3)F_B^{-}\left(0\right)=F^{+}\left(0\right)\exp \left(-{\displaystyle \frac{q{V}_{\mathrm{D}\mathrm{S}}}{kT}}\right).

The number of carriers at the top of the potential barrier can be expressed as

(4)Q\left(0\right)=q{\displaystyle \frac{F^{+}\left(0\right)+F^{-}(0)}{v_{\mathrm{i}\mathrm{n}\mathrm{j}}}},

where v_{\mathrm{i}\mathrm{n}\mathrm{j}} represents the emission velocity at the contact region. By combining Eq. (1) and Eq. (4), we obtain

(5)I_{\mathrm{D}\mathrm{S}}=WQ\left(0\right)v_{\mathrm{i}\mathrm{n}\mathrm{j}}{\displaystyle \frac{1-F^{-}(0)/F^{+}\left(0\right)}{1+F^{-}(0)/F^{+}\left(0\right)}}.

Substituting Eq. (2) and Eq. (3) into Eq. (5), the transport current of the nano-MOSFET under non-degenerate conditions can be obtained,

(6)I_{\mathrm{D}\mathrm{S}}=WQ\left(0\right)v_{\mathrm{i}\mathrm{n}\mathrm{j}}\left({\displaystyle \frac{1-r}{1+r}}\right){\displaystyle \frac{1-\exp \left(-{\displaystyle \frac{q{V}_{\mathrm{D}\mathrm{S}}}{kT}}\right)}{1+\left({\displaystyle \frac{1-r}{1+r}}\right)\exp \left(-{\displaystyle \frac{q{V}_{\mathrm{D}\mathrm{S}}}{kT}}\right)}}.

For a well-designed MOSFET, the total carrier concentration at the channel inversion layer potential barrier is approximately determined solely by the gate voltage, i.e., Q\left(0\right)\approx C_{\mathrm{O}\mathrm{X}}(V_{\mathrm{G}\mathrm{S}}-V_{\mathrm{T}\mathrm{H}}), where C_{\mathrm{O}\mathrm{X}} represents the MOSFET oxide capacitance, V_{\mathrm{G}\mathrm{S}} is the gate-source voltage, and V_{\mathrm{T}\mathrm{H}} is the threshold voltage. When the drain-source voltage V_{\mathrm{D}\mathrm{S}}\gg kT/q, Eq. (6) can be simplified as

(7)I_{\mathrm{D}\mathrm{S}}=C_{\mathrm{O}\mathrm{X}}W{v}_{\mathrm{i}\mathrm{n}\mathrm{j}}\left({\displaystyle \frac{1-r}{1+r}}\right)\left(V_{\mathrm{G}\mathrm{S}}-V_{\mathrm{T}\mathrm{H}}\right).

The backscattering coefficient r can be analytically calculated using the kT-layer model [26]:

(8)r={\displaystyle \frac{L_{KT}}{L_{KT}+{\lambda }_0}}.

As shown in Fig. 1, L_{KT} represents the kT-layer length, which represents the distance from the top of the channel barrier to the point where the drain region potential drops by kT/q. Within the kT-layer length, carriers from the source region that cross the channel barrier top may be scattered back to the source region. After carriers have traveled through the kT-layer length, the probability of returning to the source region can be neglected. According to the definition of L_{KT}, L_{KT}=\left(kT/q\right)/\epsilon (0^{+}), where \epsilon (0^{+}) represents the average electric field strength in the kT-layer [32]. {\lambda }_0 is the mean free path of carriers in the inversion layer, and {\lambda }_0=2kT{\mu }_0/(q{v}_{\mathrm{i}\mathrm{n}\mathrm{v}}), where {\mu }_0 is the low-field mobility and v_{inv} is the average random thermal velocity of the carriers in the inversion layer. Substituting Eq. (8) into Eq. (7) gives

(9)I_{\mathrm{D}\mathrm{S}}={\displaystyle \frac{C_{\mathrm{O}\mathrm{X}}W(V_{\mathrm{G}\mathrm{S}}-V_{\mathrm{T}\mathrm{H}})}{{\displaystyle \frac{1}{v_{\mathrm{i}\mathrm{n}\mathrm{j}}}}+{\displaystyle \frac{1}{{\mu }_0\epsilon (0^{+})}}{\displaystyle \frac{v_{\mathrm{i}\mathrm{n}\mathrm{v}}}{v_{\mathrm{i}\mathrm{n}\mathrm{j}}}}}}.

Eq. (9) represents the channel current of the nano-MOSFET as consisting of two components of velocity: one is the carrier emission velocity v_{\mathrm{i}\mathrm{n}\mathrm{j}}, representing ballistic transport, and the other is the traditional drift velocity {\mu }_0\epsilon (0^{+})v_{\mathrm{i}\mathrm{n}\mathrm{j}}/v_{\mathrm{i}\mathrm{n}\mathrm{v}}, representing conventional drift-diffusion transport. Therefore, Eq. (9) is applicable to the entire range from drift-diffusion to ballistic transport. By analyzing the two components of velocity, the transition of the channel current noise mechanism in nano-MOSFET devices can be explored.

When the size of the MOSFET device decreases to below 90 nm, short-channel effects significantly impact the device’s performance, leading to more noise. Therefore, in this paper, the mobility expression resulting from the mobility degradation effect is introduced,

(10){\mu }_n={\displaystyle \frac{{\mu }_{n0}}{\sqrt{1+{\displaystyle \frac{{\mu }_{n0}q{E}_y^2}{d}}\left[1-\exp \left(-p\times y\right)\right]}}},

where (d={10}^{-8}W) represents the energy relaxation parameter, Eq. (10) can be used to calculate the mobility of each point in the channel. This expression includes the mobility reduction effect influenced by longitudinal electric field, transverse electric field, and electron temperature gradient. Among them [15],

(11){\mu }_{n0}={\displaystyle \frac{{\mu }_0}{1+{\theta }_1{V}_{\mathrm{G}\mathrm{T}}+\left[\sqrt{{\displaystyle \frac{{\theta }_2}{L_{\mathrm{e}\mathrm{f}\mathrm{f}}}}}-{\theta }_1\left(1-0.5\alpha \right)\right]V_{\mathrm{D}\mathrm{S}}}},

(12)p={\displaystyle \frac{2d}{3K{\mu }_{n0}{T}_0{E}_y}},

(13)V_{\mathrm{G}\mathrm{T}}=V_{\mathrm{G}\mathrm{S}}-V_{\mathrm{T}\mathrm{H}}=V_{\mathrm{G}\mathrm{S}}-(V_{\mathrm{T}\mathrm{H}0}-\sigma V_{\mathrm{D}\mathrm{S}}),

where {\mu }_0 is the low-field mobility, {\theta }_1 and {\theta }_2 are fitting parameters, \alpha is the body factor term, T_0=300\mathrm{K}, V_{\mathrm{T}\mathrm{H}0} represents the threshold voltage of the MOSFET device, and \sigma is the factor for drain-induced barrier lowering (DIBL) effect. E_y is the transverse electric field in the channel,

(14)E_y={\displaystyle \frac{1}{{\displaystyle \frac{1}{E_{\mathrm{C}}}}+{\displaystyle \frac{1}{V_{\mathrm{D}\mathrm{S}\mathrm{A}\mathrm{T}}}}2L_{\mathrm{e}\mathrm{l}\mathrm{e}\mathrm{c}}\sqrt{1-{\displaystyle \frac{y}{L_{\mathrm{e}\mathrm{l}\mathrm{e}\mathrm{c}}}}}}}.

Here, E_{\mathrm{C}} is the critical electric field, and E_{\mathrm{C}}=2v_{\mathrm{s}\mathrm{a}\mathrm{t}}/{\mu }_{n0}. v_{\mathrm{s}\mathrm{a}\mathrm{t}}=1.0\times {10}^5\mathrm{m}\cdot {\mathrm{s}}^{-1}. L_{\mathrm{e}\mathrm{l}\mathrm{e}\mathrm{c}} is the electrical channel length: L_{\mathrm{e}\mathrm{l}\mathrm{e}\mathrm{c}}=L_{\mathrm{e}\mathrm{f}\mathrm{f}}-\mathrm{\Delta }L. The saturation voltage V_{\mathrm{D}\mathrm{S}\mathrm{A}\mathrm{T}} of the MOSFET device is given by the following Eq. (15) [16]:

(15)V_{\mathrm{D}\mathrm{S}\mathrm{A}\mathrm{T}}={\displaystyle \frac{2V_{\mathrm{G}\mathrm{T}}}{1+\sqrt{1+{\displaystyle \frac{2V_{\mathrm{G}\mathrm{T}}}{\alpha L_{\mathrm{e}\mathrm{f}\mathrm{f}}{E}_{\mathrm{C}}}}}}},

where \mathrm{\Delta }L is the channel length variation induced by the channel length modulation effect, which can be expressed as

(16)\mathrm{\Delta }L=l\ln \left({\displaystyle \frac{V_{\mathrm{D}\mathrm{S}}-V_{\mathrm{D}\mathrm{S}\mathrm{A}\mathrm{T}}}{l{E}_{\mathrm{C}}}}+{\displaystyle \frac{E_{\mathrm{D}}}{E_{\mathrm{C}}}}\right),

(17)E_{\mathrm{D}}=\sqrt{{\left({\displaystyle \frac{V_{\mathrm{D}\mathrm{S}}-V_{\mathrm{D}\mathrm{S}\mathrm{A}\mathrm{T}}}{l}}\right)}^2+E_{\mathrm{C}}^2},

(18)l={\displaystyle \frac{1}{\lambda }}\sqrt{{\displaystyle \frac{{\epsilon }_{\mathrm{S}\mathrm{i}}}{{\epsilon }_{\mathrm{O}\mathrm{X}}}}{t}_{\mathrm{O}\mathrm{X}}{X}_j},

where {\epsilon }_{\mathrm{S}\mathrm{i}} is the dielectric constant of silicon, {\epsilon }_{\mathrm{O}\mathrm{X}} is the dielectric constant of the oxide layer, t_{\mathrm{O}\mathrm{X}} is the gate oxide thickness, X_j is the source/drain junction depth, and \lambda =5.23 is the fitting parameter used to calculate the channel length modulation effect. Subsequently, by substituting the effective mobility expression Eq. (10) into Eq. (9), the current expression incorporating various short-channel effects is obtained,

(19)I_{\mathrm{D}\mathrm{S}}={\displaystyle \frac{C_{\mathrm{O}\mathrm{X}}W(V_{\mathrm{G}\mathrm{S}}-V_{\mathrm{T}\mathrm{H}})}{{\displaystyle \frac{1}{v_{\mathrm{i}\mathrm{n}\mathrm{j}}}}+{\displaystyle \frac{1}{{\mu }_n\epsilon (0^{+})}}{\displaystyle \frac{v_{\mathrm{i}\mathrm{n}\mathrm{v}}}{v_{\mathrm{i}\mathrm{n}\mathrm{j}}}}}},

where v_{\mathrm{i}\mathrm{n}\mathrm{j}} is the injection velocity of carriers emitted from the contact region into the channel, which is generally expressed as [26, 32]

(20)v_{\mathrm{i}\mathrm{n}\mathrm{j}}=v_T^{3\mathrm{D}}=v_T{\displaystyle \frac{F_1\left({\eta }_{\mathrm{F}}\right)}{F_{1/2}\left({\eta }_{\mathrm{F}}\right)}},

where v_T=\sqrt{\left(2KT\right)/\left(\pi m_t\right)} is the random thermal velocity of carriers. F_j denotes the j-th order Fermi−Dirac integral, and {\eta }_{\mathrm{F}}=\left(E_{\mathrm{F}}-E_{\mathrm{C}}\right)/(KT) is the carrier degeneracy factor. Meanwhile, the average random thermal velocity of carriers in the inversion layer is expressed as [33]

(21)v_{\mathrm{i}\mathrm{n}\mathrm{v}}=v_T^{2\mathrm{D}}=\sqrt{{\displaystyle \frac{\pi KT}{2m^{\ast }}}},

where m^{\ast } is the effective mass of the electron. From Eq. (19), it can be seen that the channel current in a nanoscale MOSFET consists of two velocity components: one is the carrier injection velocity v_{\mathrm{i}\mathrm{n}\mathrm{j}}, representing ballistic transport; the other is the conventional drift velocity {\mu }_n\epsilon (0^{+})v_{\mathrm{i}\mathrm{n}\mathrm{j}}/v_{\mathrm{i}\mathrm{n}\mathrm{v}}, representing conventional drift-diffusion transport. These two components are in parallel, and the current behavior depends on the smaller of the two. That is, when , v_{\mathrm{i}\mathrm{n}\mathrm{j}} plays the dominant role in Eq. (19), and the carrier transport mechanism of the device is closer to ballistic transport. Conversely, when v_{\mathrm{i}\mathrm{n}\mathrm{j}}>{\mu }_n\epsilon (0^{+})v_{\mathrm{i}\mathrm{n}\mathrm{j}}/v_{\mathrm{i}\mathrm{n}\mathrm{v}}, the conventional drift-diffusion velocity plays the dominant role, and the carrier transport behaves more like conventional drift-diffusion transport. These two transport mechanisms lead to different types of noise: barrier-limited carrier injection results in shot noise, whereas scattering in drift-diffusion transport induces thermal noise. Therefore, both types of noise coexist in nano-MOSFET devices, and the dominant noise type depends on the carrier transport mechanism in the device.

According to Eq. (19), the condition for the dominant component of excess channel current noise in nanoscale MOSFET devices to transition from thermal noise to shot noise can be expressed as

(22)

Substituting Eq. (20) and (21) into Eq. (22) yields

(23)

Using the description of the electric field intensity from Ref. [26]:

(24)\epsilon \left(0^{+}\right)={\displaystyle \frac{kT/q}{L_{\mathrm{G}}{\left[kT/(q{V}_{\mathrm{D}\mathrm{S}})\right]}^{\beta }}},

where L_{\mathrm{G}} is the channel length, and \beta is the fitting parameter, . Substituting Eq. (24) into Eq. (23) yields

(25)

From Eq. (25), it can be clearly observed that the critical channel length for the transition from thermal noise to shot noise is directly proportional to the drain-source voltage and inversely proportional to temperature. To further investigate its transition conditions in relation to the gate voltage and doping concentration, the expression for the average random thermal velocity of inversion layer carriers from Ref. [26] is adopted,

(26)v_{\mathrm{i}\mathrm{n}\mathrm{v}}=v_T^{2\mathrm{D}}=v_T{\displaystyle \frac{F_{1/2}\left({\eta }_{\mathrm{F}}\right)}{F_0\left({\eta }_{\mathrm{F}}\right)}}.

The influence of gate voltage and substrate doping is incorporated in the carrier degeneracy {\eta }_{\mathrm{F}} of this expression. Substituting Eq. (26) and the electric field intensity expression (24) into (22) yields

(27)

where \rho =F_0\left({\eta }_{\mathrm{F}}\right)/F_{1/2}\left({\eta }_{\mathrm{F}}\right).

3 Transition condition analysis

It can be seen from Eqs. (25) and (27) that, under certain bias conditions, a reduction in channel length will cause the inequality condition to hold, thereby satisfying the critical conditions for the transition. The dominant component of MOSFET excess noise will gradually shift from thermal noise to shot noise. The shortening of the channel length reduces the number of inelastic scattering events and weakens space-charge effects [34]. The reduction in inelastic scattering and the weakening of space-charge effects lessen the suppression of shot noise by long-range Coulomb interactions, causing the device transport characteristics to shift from conventional drift-diffusion transport to ballistic transport. As a result, shot noise becomes the dominant component of excess noise, surpassing thermal noise. Additionally, increased mobility also makes the equation valid. Mobility is determined by the scattering mechanism with the highest scattering rate [35]. In phonon scattering, the acoustic phonon scattering probability is greater than the optical phonon scattering probability, while the scattering probability between carriers is much smaller than the two phonon scattering probabilities [36]. With increasing temperature, all three types of scattering increase. At low temperatures, the concentration of thermally excited carriers is low, their mean free path is large, and the scattering probability is small. Therefore, mobility is relatively high. As the temperature increases, the carrier concentration is enhanced, scattering becomes more frequent, and mobility consequently decreases. Therefore, either lowering the operating temperature or using high-mobility materials for the channel will make it easier for the dominant component of excess noise in MOSFET devices to become shot noise.

According to Eq. (27), Fig. 2 illustrates the transition of excess noise components in nanoscale MOSFET devices as a function of gate voltage. Figure 2(a) shows that the critical channel length at which shot noise becomes the dominant component of excess noise in MOSFET devices is around 20 nm. The statistical mean of this dataset is \mu =23.7\mathrm{n}\mathrm{m}, with a standard deviation of \sigma =9.6\mathrm{n}\mathrm{m}. The relatively large standard deviation clearly reflects the significant influence of gate voltage on the critical channel length. Figure 2(b) shows that \rho exhibits an inverse relationship with the gate voltage V_{\mathrm{G}\mathrm{S}}, where {\eta }_{\mathrm{F}}=\left(E_{\mathrm{F}}-E_{\mathrm{C}}\right)/(KT) represents the carrier degeneracy, E_{\mathrm{F}} is the Fermi level at the contact, and E_{\mathrm{C}} is the barrier height. The channel barrier height E_{\mathrm{C}} decreases as the gate voltage increases, meaning that {\eta }_F is an increasing function of V_{\mathrm{G}\mathrm{S}}. Consequently, \rho is a decreasing function of the gate voltage V_{\mathrm{G}\mathrm{S}}. As shown in Fig. 2(a), with the increase in gate voltage, the right-hand side of (27) gradually decreases. This indicates that the critical channel length at which the dominant excess noise component transitions from thermal noise to shot noise decreases as the gate voltage increases. In other words, a higher gate voltage makes it more difficult for shot noise to become the dominant component of excess noise. This phenomenon occurs because, as the gate voltage increases, the enhanced longitudinal electric field leads to more surface scattering for carriers, necessitating a shorter channel length to mitigate the scattering effects. Additionally, an increase in gate voltage has two effects: first, it increases the frequency of inelastic scattering, strengthening the Coulomb interaction that suppresses shot noise [37]; second, it enhances carrier degeneracy, reinforcing Pauli exclusion principle suppression, making shot noise less likely to become the dominant component of excess noise [38]. Experimental results confirm that increasing the gate voltage enhances shot noise suppression [12].

Figure 3(a) illustrates the relationship between the excess noise component transition and the drain-source voltage in nanoscale MOSFETs. The red bars represent the results calculated using Eq. (25), with statistical data of \mu \pm \sigma =19.3\pm 9.68\mathrm{n}\mathrm{m}, while the green bars represent the results calculated using Eq. (27), with statistical data of \mu \pm \sigma =18.9\pm 10.6\mathrm{n}\mathrm{m}. Both expressions indicate that, as the drain-source voltage increases, the value on the right-hand side of the transition condition for the excess noise component rises steadily. For devices with different channel lengths, a higher drain-source voltage results in a longer critical channel length where shot noise becomes the dominant excess noise component. For devices in which the channel length is fixed, when the drain-source voltage exceeds a certain critical value, Eqs. (25) and (27) hold true, and shot noise becomes the primary component of excess noise. The experiment in [12] also observed this phenomenon. As the drain-source voltage increases, the kT-layer length shortens [26], leading to a reduction in the backscattering coefficient and a transition toward ballistic transport [21, 22]. At low drain-source voltages, the electric field is weak, and carrier transport is closer to conventional drift-diffusion transport, making the noise resemble equilibrium thermal noise. At high drain-source voltages, the electric field is significantly enhanced, carrier velocity increases rapidly, scattering is reduced, and transport approaches ballistic conduction, with shot noise becoming the dominant component.

Figure 3(b) illustrates the relationship between temperature and the transition of excess noise components in nanoscale MOSFET devices. As shown in the figure, with increasing temperature, the critical channel length at which shot noise becomes the dominant component of excess noise gradually decreases. This indicates that at higher temperatures, shot noise is less likely to be the primary component of excess noise. The red bars represent the results calculated using Eq. (25), with a statistical result of \mu \pm \sigma =20.3\pm 0.53\mathrm{n}\mathrm{m}, and the green bars represent the results calculated using Eq. (27), with \mu \pm \sigma =20.2\pm 0.67\mathrm{n}\mathrm{m} under these conditions. The relatively smaller value of \sigma indicates that, within the normal range of operating temperature fluctuations, T is a secondary factor affecting L_{\mathrm{G}}. In modern MOS devices, the main scattering mechanisms affecting carriers in the channel are acoustic phonon scattering and optical phonon scattering, both of which decrease in probability as temperature decreases [13]. In the low-temperature region, as the temperature increases, the average velocity of carrier thermal motion increases [36], enabling carriers to skim over the impurity ions faster with smaller deflection angles, making carriers less likely to be scattered. Thus, in the low-temperature region, the suppression of shot noise by the Coulomb effect is weak, and the channel excess noise is primarily governed by shot noise. As the temperature continues to rise, the primary scattering mechanism in the device becomes acoustic wave scattering, which is directly proportional to temperature. The increased frequency of phonon scattering leads to a stronger suppression of shot noise and a decrease in mobility, causing thermal noise to increases with rising temperature. Therefore, at lower temperatures, the transition from thermal noise to shot noise occurs more easily, resulting in a higher proportion of shot noise in the total current noise.

Figure 4 illustrates the transition of excess noise components in nanoscale MOSFETs with substrate doping density. An increase in substrate doping density raises the barrier height E_{\mathrm{C}}, leading to a decrease in {\eta }_{\mathrm{F}}. As shown in Fig. 4(b), \rho is positively correlated with the substrate doping density N_{\mathrm{C}\mathrm{H}}. As N_{\mathrm{C}\mathrm{H}} increases, the Fermi potential {\psi }_{\mathrm{F}\mathrm{P}}=\frac{kT}{q}\ln \frac{N_A}{n_i} gradually increases. N_A indicates the substrates doping concentration, and n_i denotes the concentration of intrinsic carriers. When the surface of the channel region reaches strong inversion, the energy band bending must be equal to or greater than twice the Fermi potential, i.e., U_S=2{\psi }_{\mathrm{F}\mathrm{P}}. This means that as the substrate doping density increases, the threshold voltage of the MOSFET also increases. The total carrier charge at the potential barrier peak in the channel inversion layer of the MOSFET is approximately Q\left(0\right)\approx C_{\mathrm{O}\mathrm{X}}\left(V_{\mathrm{G}\mathrm{S}}-V_{\mathrm{T}\mathrm{H}}\right). For a fixed gate voltage, an increase in substrate doping density reduces the number of carriers in the channel inversion layer. As shown in Fig. 4(a), with increasing substrate doping density, the critical channel length at which shot noise becomes the dominant component of excess noise gradually increases, with statistical parameters of \mu \pm \sigma =21.3\pm 0.69\mathrm{n}\mathrm{m}. The reduction in carriers in the channel inversion layer weakens carrier scattering, which in turn reduces shot noise suppression and makes shot noise gradually surpass thermal noise, becoming the primary component of excess noise in the device.

A statistical analysis of Figs. 2 to 4 reveals that, although the trends and magnitudes of the effects of different operating conditions (V_GS, V_DS, T) and process parameters (N_CH) on the critical channel length vary, their statistical mean values all fall within a narrow range of 19.8 nm to 23.7 nm. Furthermore, the fluctuation range of L_{\mathrm{G}} (defined by \mu \pm \sigma) under all conditions broadly covers the range of about 15 nm to 33 nm. This analysis indicates that, for the nanoscale-channel-length MOSFETs focused on in this study, the critical scale for the transition of the dominant transport mechanism is not a fixed process node value, but rather a dynamic range modulated by multiple factors. For typical process and operating conditions (V_DS/V_GS = 0.5–0.7 V, N_CH = 5 × 10²¹–3 × 10²² {\mathrm{m}}^{-3}, T = 290–350 K), the critical channel length for the transition of the main excess noise component is dynamically distributed in the range of 18 nm to 24 nm. This represents the characteristic length at which this physical transition is most likely to occur under typical design and operating conditions.

4 Monte Carlo simulation

A three-dimensional Monte Carlo simulation flow is established based on the structural characteristics of nanoscale MOSFET devices, and the channel current noise for different channel lengths is extracted. As shown in Fig. 5, as the channel length decreases, the channel current noise of the nanoscale MOSFET device gradually deviates from thermal noise and approaches full shot noise near a channel length of 20 nm. This is consistent with the physical model and is also in close agreement with the experimental trends reported in Ref. [12] regarding how various types of noise vary with channel length. As the channel length shortens, carrier transport transitions from conventional drift-diffusion transport to ballistic transport. Subsequently, the noise for channel lengths of 10 nm, 20 nm, and 30 nm is analyzed through simulations with different bias parameters. In the simulations, the oxide layer thickness is set to 1 nm, and the channel thickness is set to 3 nm. The source-drain regions are modeled as ideal isotropic n-type silicon, with a doping concentration of 2 × 10²⁰ cm⁻³. The channel region utilizes low-doped p-type silicon, with the doping concentration treated as a simulation variable. As the simulation region is primarily focused on the channel inversion layer, a dense mesh is applied to the channel region, employing a three-dimensional grid structure of 120 × 50 × 1. Furthermore, to accurately capture the rapid dynamic changes of carriers at the nanoscale, the simulation time step Δt is set to 1 fs. The number of supercarriers selected for the simulation is 10 000. The band structure employed a modified non-parabolic band structure.

Figure 6 illustrates the variation of channel current noise components with bias voltage. Figure 6(a) shows that as the gate voltage increases, the channel current noise gradually rises. This phenomenon occurs because a higher gate voltage drives the channel into a strong inversion state, enhancing the longitudinal electric field and increasing the carrier density. This leads to more scattering and a slight increase in thermal noise. Meanwhile, the channel current noise moves away from the total shot noise level, meaning that shot noise is more suppressed as the gate voltage increases. As a result, at higher gate voltages, shot noise is less likely to be the main part of the excess noise in the channel. Figure 6(b) shows how the shot noise suppression factor changes with gate voltage. As the gate voltage increases, the suppression factor decreases slightly, meaning that a higher gate voltage further suppresses shot noise, reducing its contribution to excess noise.

Figure 6(c) shows how the channel current noise components change with the drain-source voltage. As the drain-source voltage increases, the channel current noise rises slightly, but the change is small. Meanwhile, the total shot noise component increases. Figure 6(d) shows that as the drain-source voltage increases, the shot noise suppression factor also increases, meaning that the proportion of shot noise becomes larger. This happens because a higher drain-source voltage increases the carrier velocity, reducing the number of scattering events in the channel. As a result, the thermal noise component decreases, whereas the shot noise component increases to compensate for this reduction. This explains why the overall change in channel current noise in Fig. 6(c) is small. Therefore, as the drain-source voltage increases, the dominant component of excess noise gradually shifts from thermal noise to shot noise.

Furthermore, Figs. 6(a)−(d) collectively indicate that as the channel length decreases, the noise in the device channel region gradually increases, leading to excess noise. Concurrently, the shot noise suppression factor rises, indicating that the degree of shot noise suppression weakens progressively with decreasing channel length. Specifically, when the channel length is reduced from 30 nm to 20 nm, the increase in the shot noise suppression factor is relatively small. However, when the channel length is further decreased from 20 nm to 10 nm, the shot noise suppression factor increases significantly, with a marked rise in the shot noise component. This suggests that as the channel length is reduced to approximately 20 nm, the dominant component of excess noise begins to shift from being primarily thermal noise to being predominantly suppressed shot noise.

Figure 7(a) shows the variation of channel current noise components with substrate doping density. As the substrate doping density increases, the channel current noise gradually decreases and approaches the total shot noise level. This trend indicates that with higher substrate doping density, the dominant component of excess noise in the channel shifts from thermal noise to suppressed shot noise. Figure 7(b) further reveals the relationship between the shot noise suppression factor and substrate doping density. As the substrate doping density increases, the shot noise suppression factor increases slightly, indicating that the proportion of shot noise in the excess noise of the MOSFET gradually rises.

Figure 7(c) illustrates the variation of channel current noise components with temperature. As the temperature increases from 200 K to 320 K, the channel current noise gradually deviates from the total shot noise level. This phenomenon occurs because the rise in temperature enhances inelastic scattering effects, thereby increasing the suppression of shot noise. As a result, shot noise becomes less likely to dominate the excess noise in the channel at higher temperatures. Figure 7(d) further reveals the relationship between the shot noise suppression factor and temperature. As the temperature increases, the shot noise suppression factor gradually decreases, indicating a declining proportion of shot noise in the excess noise of the channel.

The analysis of Figs. 7(a)–(d) indicates a strong size dependence of the excess noise components in MOSFET channels, with approximately 20 nm serving as the critical channel length for this transition. Specifically, as the channel length decreases, the shot noise suppression factor increases monotonically, leading to a substantial rise in the proportion of suppressed shot noise. As seen in Figs. 7(b) and (d), the degree of shot noise suppression changes little when the channel length is reduced from 30 nm to 20 nm. However, when the channel length is further decreased from 20 nm to 10 nm, the shot noise suppression factor increases significantly, accompanied by a marked increase in the shot noise component. This finding corroborates the theoretical prediction that when the channel length is reduced to around 20 nm, the dominant component of channel excess noise transitions from thermal noise to suppressed shot noise.

5 Conclusion

Based on the McKelvey flux method, a model for the transition of excess noise components in nanoscale-channel-length MOSFETs is established. Combined with 3D Monte Carlo simulations, the evolution of excess noise components with decreasing channel length in small-scale nanoscale MOSFET devices is revealed: the transition of the dominant component from thermal noise to shot noise occurs within a threshold range centered at approximately 20 nm (with a dynamic range of 18–24 nm). When the channel length falls below this range, the carrier transport mechanism shifts from being dominated by drift-diffusion to being dominated by ballistic transport. Ballistic transport leads to the dominance of shot noise. Furthermore, at specific device dimensions, the transition of noise components is also regulated by several key parameters: a decrease in gate voltage, an increase in drain-source voltage, a decrease in temperature, and an increase in substrate doping concentration all lead to an increase in the shot noise component. The transition of excess noise mechanisms is determined by a dynamic phase boundary jointly modulated by electrical and process parameters.

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