High-quality industrial n-type silicon wafers with an efficiency of over 23% for Si heterojunction solar cells

Abstract

n-type CZ-Si wafers featuring longer minority carrier lifetime and higher tolerance of certain metal contamination can offer one of the best Si-based solar cells. In this study, Si heterojuction (SHJ) solar cells which was fabricated with different wafers in the top, middle and tail positions of the ingot, exhibited a stable high efficiency of>22% in spite of the various profiles of the resistivity and lifetime, which demonstrated the high material utilization of n-type ingot. In addition, for effectively converting the sunlight into electrical power, the pyramid size, pyramid density and roughness of surface of the Cz-Si wafer were investigated by scanning electron microscope (SEM) and transmission electron microscope (TEM). Furthermore, the dependence of SHJ solar cell open-circuit voltage on the surface topography was discussed, which indicated that the uniformity of surface pyramid helps to improve the open-circuit voltage and conversion efficiency. Moreover, the simulation revealed that the highest efficiency of the SHJ solar cell could be achieved by the wafer with a thickness of 100 µm. Fortunately, over 23% of the conversion efficiency of the SHJ solar cell with a wafer thickness of 100 µm was obtained based on the systematic optimization of cell fabrication process in the pilot production line. Evidently, the large availability of both n-type ingot and thinner wafer strongly supported the lower cost fabrication of high efficiency SHJ solar cell.

Keywords

n-type Cz-Si / thinner wafer / surface texture / high efficiency / SHJ solar cell

Introduction

The large availability of mono-Si and multi-Si wafers rapidly expands the global photovoltaic market. The mono-Si wafer helps to produce higher power solar cells than the multi-Si wafer. The key challenge for mono-Si wafer solar cell is further reduction of the fabrication cost. A thinner wafer accompanied with higher solar cell efficiency remains the most effective way to reduce cost. A route to achieve higher solar cell efficiency is to improve the solar-grade materials and key processes. For high-efficiency mono-Si solar cells, the n-type silicon has already been a proper alternative to the p-type silicon and efficiencies beyond 25% in the laboratory level have been reached on the n-type Cz substrate, such as the heterojunction back contact (HBC) solar cell [ 1, 2], the interdigitated back contact (IBC) solar cell [ 3], and the rear contact tunnel oxide passivated contact (Topcon) solar cell [ 4]. The n-type Si features the smaller impact of certain metal impurities such as interstitial iron on the material electrical quality and the absence of the boron-oxygen-related light induced degradation. Fabricating high-efficiency devices with the n-type wafer will be the main trend in future photovoltaic industry. Among the previously mentioned high-efficiency solar cells, the amorphous-silicon/crystalline-silicon heterojunction (SHJ) solar cell is of great interest to researchers due to their high open-circuit voltage (V_oc), low temperature coefficiency and bifacial power generation. Thinner wafers can be used not only to reduce silicon consumption, but also to simultaneously yield higher power energy if the defects and optical light loss are minimized for the SHJ solar cell. Over the past 10 years, the thickness of wafer has been reduced from 200 µm to around 130µm with a diamond-wire saw while its efficiency has been increased to around 22% [ 5]. In this paper, it is demonstrated that SHJ solar cells with a wafer thickness of 100 µm and an efficiency of above 23% was fabricated in the pilot production line.

Experimental results and discussion

Structure of SHJ solar cell

Figure 1 shows the structure of the SHJ solar cell in this paper. An intrinsic a-Si:H (i-a-Si:H) layer followed by a p-type a-Si:H (p-a-Si:H) layer are deposited by PECVD on a randomly textured n-type Cz Si wafer to form a built-in electric field. On the other side of the wafer, i-a-Si:H and n-type a-Si:H (n-a-Si:H) layers are deposited to obtain a back surface field structure. On the sides of the p/na-Si:H layers, transparent conductive oxide (TCO) layers of around 80 nm, In₂O₃ film doped by WO₃(IWO) are deposited by the reactive plasma deposition (RPD) process [ 6], and metal grid electrodes are prepared by using the screen-printing technique. Evidently, this solar cell has the symmetric structure feature which makes it possible to create a bifacial cell and module. The temperature for the cell-fabricating processes is around 200°C. It is well known that by inserting the high-quality i-a-Si:H layer, the defect density of the a-Si:H/c-Si hetero interface can be sufficiently reduced, resulting in a very high V_oc and high conversion efficiency together with an excellent temperature coefficient [ 2, 7– 12]. However, it is worth mentioning that the surface morphology on the textured substrate is not ignorable in the process of obtaining high V_oc.

Influence of Si wafer parameters on SHJ solar cell

There can be no doubt that the quality of the n-type Si wafer dominates the performance of SHJ solar cell, and the availability of Si ingot plays the key role in low cost PV production. In this study, the wafers are made of (100) n-type doped Cz-Si with a resistivity of 1-6 W·cm from the top, middle and tail of the ingot from Xi’an Longi Silicon Material Corp. The oxygen content in the Si wafer is varied from 4.0 to 8.0 × 10¹⁷ atom/cm³, and carbon content is always less than 1.0 × 10¹⁶ atom/cm³ for the entire ingot. The SHJ solar cells were fabricated in the condition of the cell base process developed in the Research Center for New Energy Technology, Shanghai Institute of Microsystem and Information Technology. The cell characteristics are evaluated by current-voltage measurement. Figure 2 exhibits the dependence of SHJ solar cell normalized parameters on the Si ingot position in combination with the resistivity and lifetime. The results in Fig. 2 (c) indicate that similar efficiency can be obtained independent of the ingot position. However, FF and V_oc are obviously different from the top to the tail of the Si ingot. Figure 2(a) shows that V_oc increases with the resistivity and minority carrier lifetime of the Si wafer, which is mainly attributed to the very long lifetime. In addition, the wafer in top position with low doping has a higher mobility than that with high doping. Correspondingly, higher mobility helps to reduce the recombination and improve the built-in electric field and V_oc. However, the variation of FF is the opposite of the V_oc as seen in Fig. 2(b), which indicates that FF is largely dominated by the resistivity when all the cell process is identical. Compared to the top wafer, the tail wafer could lead to a higher FF due to the higher doping and lower resistivity in the tail ingot. Distinguished from V_oc and FF, the short-circuit current (J_sc) of all SHJ solar cells is almost constant against the resistivity and lifetime. This distribution of the characteristic parameters of SHJ solar cells with Si ingot position presents a powerful indication, which means that the conversion power of SHJ solar cells is stable for all the wafers from the entire ingot. This study could serve as a guide for the manufactures of Si material and solar cells. It supports an optimal material parameter choice taking into account the minority carrier lifetime and base resistivity with respect to the V_oc and FF of the SHJ architectures.

Surface texturization and passivation

Sunlight harvesting of solar cell is mainly dominated by surface texturization. For (100) oriented wafers, the texturization consists in etching an isotropica wafer to obtain pyramidal structure defined by the {111} planes. These random pyramids greatly enhance light trapping from the illuminated surface, and therefore increase J_sc of the solar cells. In this work, potassium hydroxide (KOH) solutions has been used to form the random upright pyramidal textured surface, which is most commonly employed by the industry due to its simplicity and suitability to be integrated in industrial processes. Figure 3 depicts the various surface of the Cz-Si wafer including the bare wafer in Fig. 3(a) and textured wafers in Fig. 3(b) and (c). Correspondingly, the reflectance could be roughly decreased from 35% to 13% when the wafers are chemically textured as illustrated in Fig. 4. The initial surface of the bare Si wafer is important for the texturing process as indicated in Fig. 3(a). The serious saw damage on the wafer surface requires the careful saw damage etching and cleaning process. In addition, the pyramid size could be changed by varying the temperature, concentration of the KOH solution, and the duration in the texturization process. The pyramid size has been decreased from the previous 10 µm in Fig. 3(b) to the current 5 µm in Fig. 3(c) by modulating the concentration of the KOH solution. Correspondingly, the average reflectance at the wavelength of 400 to 1100 nm has been decreased from 13.0% to 11.0%, and could be further diminished to around 3% if IWO films as anti reflective coating is coated on the textured Si surface as seen in Fig. 4.

It is well known that the interface between the passivation layer and Cz-Si wafer plays an important role by the introduction of these texturization steps for the SHJ solar cell. On textured surface, the passivation is more difficult due to the presence of localized recombinative paths situated at the pyramid valleys and peaks as illustrated in Figs. 5(a) and (b), where the rough surface could cause the different deposition regimes of the a-Si:H layer. Especially, the microvoids and epitaxial growth occurs easily on the uneven surfaces [ 13, 14], which can lead to the low minority lifetime and poor solar cell performance. Figure 6 demonstrates the dependence of V_oc on pyramids on the textured Si surface for the SHJ solar cells. Apparently, V_oc is always less than 700 mV for wafers with a thickness of 180 µm if the pyramid surface is rough with a larger pyramid size. To further improve the passivation quality and V_oc, the Si wafer morphology has been developed featuring small pyramids in Fig. 6. Furthermore, the post isotropic etching has been utilized to modify the surface morphology, rounding the top and the valleys of pyramids, as seen in Figs. 5(c) and (d). Accordingly, the average reflectance on the wafer surface would be increased by approximately 0.2% to 1.0% after the rounding process as presented in Fig. 4. This sequence makes it possible to fabricate solar cells with V_oc over 720 mV for wafers with a thickness of 180 µm thick and toward 740 mV for wafers with a thickness of 100 µm as indicated in Fig. 6.

In fact, the overall passivation of random pyramids by the PECVD-a-Si:H film is very sensitive to growth in homogeneities, thus it is a demanding texturization quality. Obviously, the uniformity of pyramid distribution on the Si wafer, including the pyramid size and density, is an essential prerequisite for the excellent passivation of the SHJ solar cell. In this work, the effective surfactant has been applied to improve the surface wettability, and simultaneously, sufficiently nucleate the surface texturing reaction. Fortunately, the good lateral uniformity of the pyramids across the entire wafer has been achieved. Consequently, a higher V_oc of over 740 mV with a wafer thickness of 100 µm has been obtained as illustrated in Fig. 6, with the help of the improvement of the passivation layers.

Variation of SHJ solar cell performance with thickness of wafer

The low temperature process of the SHJ solar cell is suitable for the thinner wafer, which is compatible with industrial requirements of low cost and high production. Correspondingly, the influence of the thickness the Si wafer on the cell performance should be well understood. Therefore, the AFORTH-HET software has been utilized to conduct the simulation. Based on the previous simulation parameters [ 15], the thickness of the Si wafer is varied from 10 to 300 µm; as a consequence, the SHJ solar cell characterization with different thicknesses could be obtained. Figure 7(a) shows the variation of the parameters of the SHJ solar cell with the thickness the Si wafer by simulation. As is expected, V_oc almost increases linearly with the thinner wafer, J_sc is gradually decreased with the thinner wafer, and J_sc is especially abruptly decreased when the wafer thickness is less than 50 µm due to the large loss of light absorption, which is in accordance with the results in Ref. [ 16]. In addition, FF increases with the thinner wafer due to the less resistance of the thinner bulk, which coincides with the result in Section 2.2. In spite of the variations of V_oc, FF and J_sc, the conversion efficiency is basically constant when the thickness of the wafer is decreased from 300 to 90 µm. Furthermore, the maximum efficiency of around 24% in this simulation is obtained with a wafer thickness of 100 µm. Surprisingly, it is found that a conversion efficiency of>22.5% with an extremely high V_oc and FF can be achieved in simulation even though the Si wafer is only 30 µm with a lower J_sc. The efficiency gradually increases with the thickness of the wafer until the wafer is approximately 100 µm, which suggests that a thickness of 100 µm is probably a good choice for large scale SHJ solar cell fabrication.

According to the previous simulation, SHJ solar cells were prepared with wafers of different thicknesses under identical experimental processes including texturization, passivation, IWO and metallization. Figure 7(b) shows the experimental parameters of the SHJ solar cell with different wafer thicknesses from 95 µm to 185µm. It is noticed that the simulation results are in agreement with the experimental data regarding conversion efficiency, V_oc and J_sc. In addition, quite different from the FF simulation, FF of the real solar cell only slightly increases with the thinner wafer, which could be attributed to a little resistance from the bulk Si wafer. The dominating resistances of SHJ solar cells originate from other layers, such as a-Si:H layers, interfaces between TCO and a-Si:H. In view of the wafer with a thickness of 100 µm, the device has been further improved. Fortunately, a conversion efficiency of 23.1% for the SHJ solar cell has been realized as shown in Fig. 8(a) with a wafer thickness of 100 µm under the condition of the systematic optimization of the passivation layers (p/i/n a-Si:H), high mobility TCO films and fine screen-printing metallization.

In addition, these thinner SHJ solar cells have been encapsulated into the bendable solar modules, which are applied to the unmanned aerial vehicle as its power. Figure 8 (b) shows the bendable SHJ solar module with a wafer thickness of 100 µm, which is composed of the bifacial SHJ solar cells fabricated in the pilot production line.

Conclusions

In low cost production of high efficiency solar cells, it is found that the n-type Si ingot has a high availability, which is attributed to its stable high efficiency of the SHJ solar cell in spite of the top, middle or tail of the ingot from Xi’an Longi Silicon Material Corp. Additionally, in SHJ solar cells, the proper preparation of wafer surfaces with uniform pyramid size and pyramid density prior to the deposition of the passivation layers helps to attain the excellent passivation. Furthermore, according to the simulation, the wafer with a thickness of 100 µm can have the best efficiency. An efficiency of>22.5% could be obtained as long as the wafer is thicker than 30 µm. Fortunately, a conversion efficiency of 23.1% has been experimentally realized with wafer thickness of 100 µm, which have been encapsulated into the bendable bifacial modules and provided a high output power with light weight and flexibility. This work can provide practical reference for the choice of the optimal Si wafer and wafer surface. It is also valuable reference for the evaluation of the influence of variations of the wafer parameter on SHJ solar cell performance.

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