Compiler-directed power optimization of high-performance interconnection networks for load-balancing MPI applications

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Front. Comput. Sci. ›› 2007, Vol. 1 ›› Issue (1) : 94-105. DOI: 10.1007/s11704-007-0008-1

Compiler-directed power optimization of high-performance interconnection networks for load-balancing MPI applications

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{{article.zuoZheEn_L}}. {{article.titleEn}}. Front. Comput. Sci., 2007, 1(1): 94‒105 https://doi.org/10.1007/s11704-007-0008-1

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