A high dynamic range pixel using lateral overflow integration capacitor and adaptive feedback structure in CMOS image sensors

Abstract

This letter proposes a novel high dynamic range (HDR) pixel using lateral overflow integration capacitor (LOFIC) and adaptive feedback structure. Through detailed analysis of the voltage feedback mechanism, the conversion gain (CG), full well capacity (FWC) and dynamic range (DR) performances of the feedback LOFIC pixel are analytically expressed. The verification results reveal that the equivalent FWC of the feedback LOFIC pixel is 1.89 times of conventional LOFIC pixel, and the DR extension is 5.5 dB. Based on 110 nm CMOS process, a 5.0 µm pixel layout is presented, using 13.3 fF capacitance to achieve 83 ke- FWC and 102.8 dB DR, which are 44 ke- and 97.3 dB of conventional LOFIC pixel under the same design conditions. This also demonstrates that the feedback LOFIC pixel can reduce the dependence of extended DR on capacitor area, and can be used as a reference for HDR pixels design.

References

[1] LuoB, YangF, YanL. Key technologies and research development of CMOS image sensors. 2010 Second IITA International Conference on Geoscience and Remote Sensing, August 28–31, 2010, Qingdao, China, 2010, New York, IEEE: 322-325[C]

[2] SakanoY, ToyoshimaT, NakamuraR, et al.. A 132 dB single-exposure-dynamic-range CMOS image sensor with high temperature tolerance. 2020 IEEE International Solid-State Circuits Conference (ISSCC), February 16–20, 2020, San Francisco, CA, USA, 2020, New York, IEEE: 106-108[C]

[3] VelichkoS, JasinskiD, GuidashM, et al.. Automotive 3 µm HDR image sensor with LFM and distance functionality. IEEE transactions on electron devices, 2022, 69(6):2951-2956 J]

[4] SolhusvikJ, HuS, JohanssonR, et al.. A 1392×976 2.8 µm 120 dB CIS with per-pixel controlled conversion gain. 2017 International Image Sensor Workshop (IISW), May 30–June 2, 2017, Hiroshima, Japan, 2017, Sunnyvale, IISW: 298-301[C]

[5] OhY, KimM, ChoiW, et al.. A 0.8 µm nonacell for 108 megapixels CMOS image sensor with FD-shared dual conversion gain and 18,000e-full-well capacitance. 2020 IEEE International Electron Devices Meeting (IEDM), December 12–18, 2020, San Francisco, CA, USA, 2020, New York, IEEE: 16.2.1-16.2.4[C]

[6] SeoM W, KawahitoS, KagawaK, et al.. A 0.27e-RMS read noise 220-µV/e-conversion gain reset-gate-less CMOS image sensor with 0.11-µm CIS process. IEEE electron device letters, 2015, 36(12):1344-1347 J]

[7] SatoM, YorikadoY, MatsumuraY, et al.. A 0.50e-RMS noise 1.45 µm-pitch CMOS image sensor with reference-shared in-pixel differential amplifier at 8.3 Mpixel 35 fps. 2020 IEEE International Solid-State Circuits Conference (ISSCC), February 16–20, 2020, San Francisco, CA, USA, 2020, New York, IEEE: 108-110[C]

[8] XuJ, ShuL, GaoZ, et al.. Analysis and parameter optimization of high dynamic range pixels for split photodiode in CMOS image sensors. IEEE sensors journal, 2022, 22(7):6748-6754 J]

[9] FujiharaY, MurataM, NakayamaS, et al.. An over 120 dB single exposure wide dynamic range CMOS image sensor with two-stage lateral overflow integration capacitor. IEEE transactions on electron devices, 2021, 68(1):152-157 J]

[10] ShikeH, KurodaR, KobayashiR, et al.. A global shutter wide dynamic range soft X-ray CMOS image sensor with backside-illuminated pinned photodiode, two-stage lateral overflow integration capacitor, and voltage domain memory bank. IEEE transactions on electron devices, 2021, 68(4):2056-2063 J]

[11] TakaseM, IsonoS, TomekawaY, et al.. An over 120 dB wide-dynamic-range 3.0 µm pixel image sensor with in-pixel capacitor of 41.7 fF/µm² and high reliability enabled by BEOL 3D capacitor process. 2018 IEEE Symposium on VLSI Technology, June 18–22, 2018, Honolulu, HI, USA, 2018, New York, IEEE: 71-72[C]

[12] OikawaT, KurodaR, TakahashiK, et al.. A 70-dB SNR high-speed global shutter CMOS image sensor for in situ fluid concentration distribution measurements. IEEE transactions on electron devices, 2022, 69(6):2965-2972 J]

[13] MurataM, KurodaR, FujiharaY, et al.. A high near-infrared sensitivity over 70-dB SNR CMOS image sensor with lateral overflow integration trench capacitor. IEEE transactions on electron devices, 2020, 67(4):1653-1659 J]

[14] AkahaneN, SugawaS, AdachiS, et al.. A sensitivity and linearity improvement of a 100-dB dynamic range CMOS image sensor using a lateral overflow integration capacitor. IEEE journal of solid-state circuits, 2006, 41(4):851-858 J]

[15] Le-ThaiH, XhakoniA, GielenG. A column-and-row-parallel CMOS image sensor with thermal and 1/f noise suppression techniques. ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, September 12–15, 2016, Lausanne, Switzerland, 2016, New York, IEEE: 221-224[C]

[16] TakayanagiI, MiyauchiK, OkuraS, et al.. A 120-ke-full-well capacity 160-µV/e-conversion gain 2.8-µm backside-illuminated pixel with a lateral overflow integration capacitor. Sensors, 2019, 19(24): 5572 J]