Algorithm-architecture co-design for CNN acceleration exploiting linear association of weights
Lidong Xing , Yuan Wang , Zhenfu Feng
The Journal of China Universities of Posts and Telecommunications ›› 2026, Vol. 33 ›› Issue (1) : 83 -101.
To deploy convolutional neural networks (CNNs) on resource-constrained edge devices and accelerate inference, a hardware-aware CNN optimization algorithm named linear association of weights (LAW) was proposed in this paper. The algorithm reconstructs integer dot-product computations in quantized models, significantly reducing multiplication operations while maintaining accuracy. The implementation works at two granularities. At the single-kernel level, it transforms multiplications into efficient shift-and-add operations by exploiting linear relationships among weights. At the multi-channel level, a cross-channel weight association computation model ensures algorithm generality across different convolutional layers. Based on LAW, a configurable CNN hardware accelerator is designed, featuring an acceleration core that decodes weight association patterns and replaces conventional multipliers with shift-and-add combinations for hardware-level optimization. Experimental results demonstrate that compared with traditional 8-bit integer (int8) quantization, the LAW algorithm reduces 54% of multiplications for 7 × 7 convolution kernels and achieves 63% multiplication reduction for multi-channel 3 × 3 convolutional layers. When evaluated with residual network-18 (ResNet-18) on the ImageNet Large Scale Visual Recognition Challenge 2012 (ILSVRC2012) dataset, the proposed accelerator achieves 40.21 ms inference latency per image with 70.16% top-1 accuracy and 90.12 giga operations per second (GOPS) peak computation amount performance. As an innovative algorithm specifically designed for vision tasks, LAW provides effective hardware acceleration support for vision-oriented deep learning networks, making it particularly suitable for unmanned systems and industrial inspection.
accelerated inference / hardware-aware / linear association / shift-and-add
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