Highly durable and energy-efficient probabilistic bits based on h-BN/SnS₂ interface for integer factorization

Abstract

As social networks and related data processes have grown exponentially in complexity, the efficient resolution of combinatorial optimization problems has become increasingly crucial. Recent advancements in probabilistic computing approaches have demonstrated significant potential for addressing these problems more efficiently than conventional deterministic computing methods. In this study, we demonstrate a highly durable probabilistic bit (p-bit) device utilizing two-dimensional materials, specifically hexagonal boron nitride (h-BN) and tin disulfide (SnS₂) nanosheets. By leveraging the inherently stochastic nature of electron trapping and detrapping at the h-BN/SnS₂ interface, the device achieves durable probabilistic fluctuations over 10⁸ cycles with minimal energy consumption. To mitigate the static power consumption, we integrated an active switch in series with a p-bit device, replacing conventional resistors. Furthermore, employing the pulse width as the control variable for probabilistic switching significantly enhances noise immunity. We demonstrate the practical application of the proposed p-bit device in implementing invertible Boolean logic gates and subsequent integer factorization, highlighting its potential for solving complex combinatorial optimization problems and extending its applicability to real-world scenarios such as cryptographic systems.

Keywords

integer factorization / interface trap / invertible logic gate / probabilistic bit / probabilistic computing

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2025 The Author(s). InfoMat published by UESTC and John Wiley & Sons Australia, Ltd.