Design and optimization of a gate-controlled dual direction electro-static discharge device for an industry-level fluorescent optical fiber temperature sensor

Abstract

The input/output (I/O) pins of an industry-level fluorescent optical fiber temperature sensor readout circuit need on-chip integrated high-performance electro-static discharge (ESD) protection devices. It is difficult for the failure level of basic N-type buried layer gate-controlled silicon controlled rectifier (NBL-GCSCR) manufactured by the 0.18 μm standard bipolar-CMOS-DMOS (BCD) process to meet this need. Therefore, we propose an on-chip integrated novel deep N-well gate-controlled SCR (DNW-GCSCR) with a high failure level to effectively solve the problems based on the same semiconductor process. Technology computer-aided design (TCAD) simulation is used to analyze the device characteristics. SCRs are tested by trans-mission line pulses (TLP) to obtain accurate ESD parameters. The holding voltage (24.03 V) of NBL-GCSCR with the longitu-dinal bipolar junction transistor (BJT) path is significantly higher than the holding voltage (5.15 V) of DNW-GCSCR with the lateral SCR path of the same size. However, the failure current of the NBL-GCSCR device is 1.71 A, and the failure current of the DNW-GCSCR device is 20.99 A. When the gate size of DNW-GCSCR is increased from 2 μm to 6 μm, the holding voltage is increased from 3.50 V to 8.38 V. The optimized DNW-GCSCR (6 μm) can be stably applied on target readout circuits for on-chip electrostatic discharge protection.

Keywords

Electric breakdown / Semiconductor device reliability / CMOS technology

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Zhejiang University Press