RESEARCH ARTICLE

Two-dimensional subthreshold current model for dual-material gate SOI nMOSFETs with single halo

  • Suzhen LUAN ,
  • Hongxia LIU ,
  • Renxu JIA ,
  • Jin WANG
Expand
  • School of Microelectronics, Xidian University, Xi’an 710071, China

Published date: 05 Mar 2009

Copyright

2014 Higher Education Press and Springer-Verlag Berlin Heidelberg

Abstract

A two-dimensional (2D) model for the subthreshold current in the dual-material gate (DMG) silicon-on-insulator (SOI) MOSFET with a single halo is presented. The model considers single halo doping in the channel near the source and a dual-material gate to derive the channel potential using the explicit solution of the 2D Poisson’s equation. Together with the conventional drift-diffusion theory, this results in the development of a subthreshold current model for the novel structure. Model verification is carried out using the 2D device simulator ISE. Excellent agreement is obtained between the calculations and the simulated results of the model.

Cite this article

Suzhen LUAN , Hongxia LIU , Renxu JIA , Jin WANG . Two-dimensional subthreshold current model for dual-material gate SOI nMOSFETs with single halo[J]. Frontiers of Electrical and Electronic Engineering, 2009 , 4(1) : 98 -103 . DOI: 10.1007/s11460-009-0008-z

Acknowledgements

This work was supported by the National Natural Science Foundation of China (Grant No. 60206006).
1
Saxena M, Haldar S, Gupta M, Gupta R S. Design considerations for novel device architecture: hetero-material double-gate (HEM-DG) MOSFET with sub-100nm gate length. Solid-State Electronics, 2004, 48(7): 1169–1174

DOI

2
Long W, Ou H, Kuo J M, Chin K K. Dual-material gate (DMG) field effect transistor. IEEE Transactions on Electron Devices, 1999, 46(5): 865–870

DOI

3
Young K K. Short-channel effect in fully depleted SOI MOSFETs. IEEE Transactions on Electron Devices, 1989, 36(2): 399–402

DOI

4
Zhou X. Exploring the novel characteristics of hetero-material gate field-effect transistors (HMGFETs) with gate-material engineering. IEEE Transactions on Electron Devices, 2000, 47(1): 113–120

DOI

5
Hori A, Segawa M, Shimomura H, Kameyama S. A self-aligned pocket implantation (SPI) technology for 0.2-μm dual-gate CMOS. IEEE Electron Device Letters, 1992, 13(4): 174–176

DOI

6
Hori A, Hiroki A, Nakaoka H, Segawa M, Hori T. Quarter-micrometer SPI (self-aligned pocket implantation) MOSFET’s and its application for low supply voltage operation. IEEE Transactions on Electron Devices, 1995, 42(1): 78–86

DOI

7
Shin H, Lee S. A 0.1 μm asymmetric halo by large-angle-tilt implant (AHLATI) MOSFET for high performance and reliability. IEEE Transactions on Electron Devices, 1999, 46(4): 820–822

DOI

8
Najeeb-ud-din, Dunga M V, Kumar A, Vasi J, Ramgopal Rao V, Cheng B, Woo J C S. Analysis of floating body effects in thin film conventional and single pocket SOI MOSFETs using the GIDL current technique. IEEE Electron Device Letters, 2002, 23(4): 209–211

DOI

9
Reddy G V, Kumar M J. Investigation of the novel attributes of a single-halo double gate SOI MOSFET: 2D simulation study. Microelectronics Journal, 2004, 35(9): 761–765

DOI

10
Kumar M J, Chaudhry A. Two-dimensional analytical modeling of fully depleted DMG SOI MOSFET and evidence for diminished SCEs. IEEE Transactions on Electron Devices, 2004, 51(4): 569–574

DOI

11
Bolouki S, Maddah M, Afzali-kusha A, El Nokali M. A unified I-V model for PD/FD SOI MOSFETs with a compact model for floating body effects. Solid-State Electronics, 2003, 47(11): 1909–1915

DOI

12
Li Z C, Jiang Y L, Wu J M. Dual material gate SOI MOSFET with a single halo. Chinese Journal of Semiconductors, 2007, 28(3): 327–331

Options
Outlines

/