The blast furnace is a highly energy-intensive, highly polluting, and extremely complex reactor in the ironmaking process. Soft sensors are a key technology for predicting molten iron quality indices reflecting blast furnace energy consumption and operation stability, and play an important role in saving energy, reducing emissions, improving product quality, and producing economic benefits. With the advancement of the Internet of Things, big data, and artificial intelligence, data-driven soft sensors in blast furnace ironmaking processes have attracted increasing attention from researchers, but there has been no systematic review of the data-driven soft sensors in the blast furnace ironmaking process. This review covers the state-of-the-art studies of data-driven soft sensors technologies in the blast furnace ironmaking process. Specifically, we first conduct a comprehensive overview of various data-driven soft sensor modeling methods (multiscale methods, adaptive methods, deep learning, etc.) used in blast furnace ironmaking. Second, the important applications of data-driven soft sensors in blast furnace ironmaking (silicon content, molten iron temperature, gas utilization rate, etc.) are classified. Finally, the potential challenges and future development trends of data-driven soft sensors in blast furnace ironmaking applications are discussed, including digital twin, multi-source data fusion, and carbon peaking and carbon neutrality.
Machine vision measurement (MVM) is an essential approach that measures the area or length of a target efficiently and non-destructively for product quality control. The result of MVM is determined by its configuration, especially the lighting scheme design in image acquisition and the algorithmic parameter optimization in image processing. In a traditional workflow, engineers constantly adjust and verify the configuration for an acceptable result, which is time-consuming and significantly depends on expertise. To address these challenges, we propose a target-independent approach, visual interactive image clustering, which facilitates configuration optimization by grouping images into different clusters to suggest lighting schemes with common parameters. Our approach has four steps: data preparation, data sampling, data processing, and visual analysis with our visualization system. During preparation, engineers design several candidate lighting schemes to acquire images and develop an algorithm to process images. Our approach samples engineer-defined parameters for each image and obtains results by executing the algorithm. The core of data processing is the explainable measurement of the relationships among images using the algorithmic parameters. Based on the image relationships, we develop VMExplorer, a visual analytics system that assists engineers in grouping images into clusters and exploring parameters. Finally, engineers can determine an appropriate lighting scheme with robust parameter combinations. To demonstrate the effectiveness and usability of our approach, we conduct a case study with engineers and obtain feedback from expert interviews.
With the fast-growing graphical user interface (GUI) development workload in the Internet industry, some work attempted to generate maintainable front-end code from GUI screenshots. It can be more suitable for using user interface (UI) design drafts that contain UI metadata. However, fragmented layers inevitably appear in the UI design drafts, which greatly reduces the quality of the generated code. None of the existing automated GUI techniques detects and merges the fragmented layers to improve the accessibility of generated code. In this paper, we propose UI layers merger (UILM), a vision-based method that can automatically detect and merge fragmented layers into UI components. Our UILM contains the merging area detector (MAD) and a layer merging algorithm. The MAD incorporates the boundary prior knowledge to accurately detect the boundaries of UI components. Then, the layer merging algorithm can search for the associated layers within the components’ boundaries and merge them into a whole. We present a dynamic data augmentation approach to boost the performance of MAD. We also construct a large-scale UI dataset for training the MAD and testing the performance of UILM. Experimental results show that the proposed method outperforms the best baseline regarding merging area detection and achieves decent layer merging accuracy. A user study on a real application also confirms the effectiveness of our UILM.
Financing needs exploration (FNE), which explores financially constrained small- and medium-sized enterprises (SMEs), has become increasingly important in industry for financial institutions to facilitate SMEs’ development. In this paper, we first perform an insightful exploratory analysis to exploit the transfer phenomenon of financing needs among SMEs, which motivates us to fully exploit the multi-relation enterprise social network for boosting the effectiveness of FNE. The main challenge lies in modeling two kinds of heterogeneity, i.e., transfer heterogeneity and SMEs’ behavior heterogeneity, under different relation types simultaneously. To address these challenges, we propose a graph neural network named Multi-relation tRanslatIonal GrapH aTtention network (M-RIGHT), which not only models the transfer heterogeneity of financing needs along different relation types based on a novel entity—relation composition operator but also enables heterogeneous SMEs’ representations based on a translation mechanism on relational hyperplanes to distinguish SMEs’ heterogeneous behaviors under different relation types. Extensive experiments on two large-scale real-world datasets demonstrate M-RIGHT’s superiority over the state-of-the-art methods in the FNE task.
Network protocol software is usually characterized by complicated functions and a vast state space. In this type of program, a massive number of stateful variables that are used to represent the evolution of the states and store some information about the sessions are prone to potential flaws caused by violations of protocol specification requirements and program logic. Discovering such variables is significant in discovering and exploiting vulnerabilities in protocol software, and still needs massive manual verifications. In this paper, we propose a novel method that could automatically discover the use of stateful variables in network protocol software. The core idea is that a stateful variable features information of the communication entities and the software states, so it will exist in the form of a global or static variable during program execution. Based on recording and replaying a protocol program’s execution, varieties of variables in the life cycle can be tracked with the technique of dynamic instrument. We draw up some rules from multiple dimensions by taking full advantage of the existing vulnerability knowledge to determine whether the data stored in critical memory areas have stateful characteristics. We also implement a prototype system that can discover stateful variables automatically and then perform it on nine programs in ProFuzzBench and two complex real-world software programs. With the help of available open-source code, the evaluation results show that the average true positive rate (TPR) can reach 82% and the average precision can be approximately up to 96%.
Recently, the implementation of Industry 4.0 has become a new tendency, and it brings both opportunities and challenges to worldwide manufacturing companies. Thus, many manufacturing companies are attempting to find advanced technologies to launch intelligent manufacturing transformation. In this study, we propose a new model to measure the intelligent manufacturing readiness for the process industry, which aims to guide companies in recognizing their current stage and short slabs when carrying out intelligent manufacturing transformation. Although some models have already been reported to measure Industry 4.0 readiness and maturity, there are no models that are aimed at the process industry. This newly proposed model has six levels to describe different development stages for intelligent manufacturing. In addition, the model consists of four races, nine species, and 25 domains that are relevant to the essential businesses of companies’ daily operation and capability requirements of intelligent manufacturing. Furthermore, these 25 domains are divided into 249 characteristic items to evaluate the manufacturing readiness in detail. A questionnaire is also designed based on the proposed model to help process-industry companies easily carry out self-diagnosis. Using the new method, a case including 196 real-world process-industry companies is evaluated to introduce the method of how to use the proposed model. Overall, the proposed model provides a new way to assess the degree of intelligent manufacturing readiness for process-industry companies.
Stepped frequency chirp signal obtains high-resolution radar images by synthesizing multiple narrowband chirp pulses. It has been one of the most commonly used wideband radar waveforms due to its lower demand for radar instant bandwidth. In this paper, we propose a radar jamming method using two-dimensional nonperiodic phase modulation against stepped frequency chirp signal imaging radar. Using the unique property of nonperiodic phase modulation, the proposed method can generate high-level sidelobes that perform as a special blanket jamming along both the range and azimuth directions and make the target unrecognizable. Then, the influence of different modulation parameters, such as the code width and duty ratio, are further discussed. Based on this, the corresponding parameter design principles are presented. Finally, the validity of the proposed method is demonstrated by the Yake-42 plane data simulation and measured unmanned aerial vehicle data experiment.
Reversible logic has recently gained significant interest due to its inherent ability to reduce energy dissipation, which is the primary need for low-power digital circuits. One of the newest areas of relevant study is reversible logic, which has applications in many areas, including nanotechnology, DNA computing, quantum computing, fault tolerance, and low-power complementary metal-oxide-semiconductor (CMOS). An electrical circuit is classified as reversible if it has an equal number of inputs and outputs, and a one-to-one relationship. A reversible circuit is conservative if the EXOR of the inputs and the EXOR of the outputs are equivalent. In addition, quantum-dot cellular automata (QCA) is one of the state-of-the-art approaches that can be used as an alternative to traditional technologies. Hence, we propose an efficient conservative gate with low power demand and high speed in this paper. First, we present a reversible gate called ANG (Ahmadpour Navimipour Gate). Then, two non-resistant QCA ANG and reversible fault-tolerant ANG structures are implemented in QCA technology. The suggested reversible gate is realized through the Miller algorithm. Subsequently, reversible fault-tolerant ANG is implemented by the 2DW clocking scheme. Furthermore, the power consumption of the suggested ANG is assessed under different energy ranges (0.5Ek, 1.0Ek, and 1.5Ek). Simulations of the structures and analysis of their power consumption are performed using QCADesigner 2.0.03 and QCAPro software. The proposed gate shows great improvements compared to recent designs.
Quantum-dot cellular automata (QCA) is a new nanotechnology for the implementation of nano-sized digital circuits. This nanotechnology is remarkable in terms of speed, area, and power consumption compared to complementary metal-oxide-semiconductor (CMOS) technology and can significantly improve the design of various logic circuits. We propose a new method for implementing a T-latch in QCA technology in this paper. The proposed method uses the intrinsic features of QCA in timing and clock phases, and therefore, the proposed cell structure is less occupied and less power-consuming than existing implementation methods. In the proposed T-latch, compared to previous best designs, reductions of 6.45% in area occupation and 44.49% in power consumption were achieved. In addition, for the first time, a reset-based T-latch and a T-latch with set and reset capabilities are designed. Using the proposed T-latch, a new 3-bit counter is developed which reduces 2.14% cell numbers compared to the best of previous designs. Moreover, based on the 3-bit counter, a 4-bit counter is designed, which reduces 0.51% cell numbers and 4.16% cross-section area compared to previous designs. In addition, two selective counters are introduced to count from 0 to 5 and from 2 to 5. Simulations were performed using QCADesigner and QCAPro tools in coherence vector engine mode. The proposed circuits are compared with related designs in terms of delay, cell numbers, area, and leakage power.
A novel method is proposed to extend the output power back-off (OPBO) range of the Doherty power amplifier (DPA). This study reveals that the OPBO range of the DPA can be extended by tuning the output impedance of the peaking stage away from infinity and changing the phase delay of the output matching network of the carrier power amplifier. Based on this theory, a large-OPBO-range high-efficiency asymmetrical DPA working band from 1.55 to 2.2 GHz (35% relative bandwidth) is designed to verify the proposed method. Experimental results show that the DPA operates from 1.6 to 2.1 GHz. The range of the measured efficiency is 42.2%–52.1% in the OPBO state and 47%–62.7% in the saturation state. The OPBO range is 11.1–13.2 dB.