Quantitative investment (abbreviated as “quant” in this paper) is an interdisciplinary field combining financial engineering, computer science, mathematics, statistics, etc. Quant has become one of the mainstream investment methodologies over the past decades, and has experienced three generations: quant 1.0, trading by mathematical modeling to discover mis-priced assets in markets; quant 2.0, shifting the quant research pipeline from small “strategy workshops” to large “alpha factories”; quant 3.0, applying deep learning techniques to discover complex nonlinear pricing rules. Despite its advantage in prediction, deep learning relies on extremely large data volume and labor-intensive tuning of “black-box” neural network models. To address these limitations, in this paper, we introduce quant 4.0 and provide an engineering perspective for next-generation quant. Quant 4.0 has three key differentiating components. First, automated artificial intelligence (AI) changes the quant pipeline from traditional hand-crafted modeling to state-of-the-art automated modeling and employs the philosophy of “algorithm produces algorithm, model builds model, and eventually AI creates AI.” Second, explainable AI develops new techniques to better understand and interpret investment decisions made by machine learning black boxes, and explains complicated and hidden risk exposures. Third, knowledge-driven AI supplements data-driven AI such as deep learning and incorporates prior knowledge into modeling to improve investment decisions, in particular for quantitative value investing. Putting all these together, we discuss how to build a system that practices the quant 4.0 concept. We also discuss the application of large language models in quantitative finance. Finally, we propose 10 challenging research problems for quant technology, and discuss potential solutions, research directions, and future trends.
Reinforcement learning (RL) has shown significant potential for dealing with complex decision-making problems. However, its performance relies heavily on the availability of a large amount of high-quality data. In many real-world situations, data distribution in the target domain may differ significantly from that in the source domain, leading to a significant drop in the performance of RL algorithms. Domain adaptation (DA) strategies have been proposed to address this issue by transferring knowledge from a source domain to a target domain. However, there have been no comprehensive and in-depth studies to evaluate these approaches. In this paper we present a comprehensive and systematic study of DA in RL. We first introduce the basic concepts and formulations of DA in RL and then review the existing DA methods used in RL. Our main objective is to fill the existing literature gap regarding DA in RL. To achieve this, we conduct a rigorous evaluation of state-of-the-art DA approaches. We aim to provide comprehensive insights into DA in RL and contribute to advancing knowledge in this field. The existing DA approaches are divided into seven categories based on application domains. The approaches in each category are discussed based on the important data adaptation metrics, and then their key characteristics are described. Finally, challenging issues and future research trends are highlighted to assist researchers in developing innovative improvements.
In edge control systems (ECSs), edge computing demands more local data processing power, while traditional industrial programmable logic controllers (PLCs) cannot meet this demand. Thus, edge intelligent controllers (EICs) have been developed, making their secure and reliable operation crucial. However, as EICs communicate sensitive information with resource-limited terminal devices (TDs), a low-cost, efficient authentication solution is urgently needed since it is challenging to implement traditional asymmetric cryptography on TDs. In this paper, we design a lightweight authentication scheme for ECSs using low-computational-cost hash functions and exclusive OR (XOR) operations; this scheme can achieve bidirectional anonymous authentication and key agreement between the EIC and TDs to protect the privacy of the devices. Through security analysis, we demonstrate that the authentication scheme can provide the necessary security features and resist major known attacks. Performance analysis and comparisons indicate that the proposed authentication scheme is effective and feasible for deployment in ECSs.
Human mobility trajectories are fundamental resources for analyzing mobile behaviors in urban computing applications. However, these trajectories, typically collected from location-based services, often suffer from sparsity and irregularity in time. To support the development of mobile applications, there is a need to recover or estimate missing locations of unobserved time slots in these trajectories at a fine-grained spatial–temporal resolution. Existing methods for trajectory recovery rely on either individual user trajectories or collective mobility patterns from all users. The potential to combine individual and collective patterns for precise trajectory recovery remains unexplored. Additionally, current methods are sensitive to the heterogeneous temporal distributions of the observable trajectory segments. In this paper, we propose CLMove (where CL stands for contrastive learning), a novel model designed to capture multilevel mobility patterns and enhance robustness in trajectory recovery. CLMove features a two-stage location encoder that captures collective and individual mobility patterns. The graph neural network based networks in CLMove explore location transition patterns within a single trajectory and across various user trajectories. We also design a trajectory-level contrastive learning task to improve the robustness of the model. Extensive experimental results on three representative real-world datasets demonstrate that our CLMove model consistently outperforms state-of-the-art methods in terms of trajectory recovery accuracy.
Human emotions are intricate psychological phenomena that reflect an individual’s current physiological and psychological state. Emotions have a pronounced influence on human behavior, cognition, communication, and decision-making. However, current emotion recognition methods often suffer from suboptimal performance and limited scalability in practical applications. To solve this problem, a novel electroencephalogram (EEG) emotion recognition network named VG-DOCoT is proposed, which is based on depthwise over-parameterized convolutional (DO-Conv), transformer, and variational automatic encoder-generative adversarial network (VAE-GAN) structures. Specifically, the differential entropy (DE) can be extracted from EEG signals to create mappings into the temporal, spatial, and frequency information in preprocessing. To enhance the training data, VAE-GAN is employed for data augmentation. A novel convolution module DO-Conv is used to replace the traditional convolution layer to improve the network. A transformer structure is introduced into the network framework to reveal the global dependencies from EEG signals. Using the proposed model, a binary classification on the DEAP dataset is carried out, which achieves an accuracy of 92.52% for arousal and 92.27% for valence. Next, a ternary classification is conducted on SEED, which classifies neutral, positive, and negative emotions; an impressive average prediction accuracy of 93.77% is obtained. The proposed method significantly improves the accuracy for EEG-based emotion recognition.
We first introduce a new approach for optimising a cascaded spline adaptive filter (CSAF) to identify unknown nonlinear systems by using a meta-heuristic optimisation algorithm (MOA). The CSAF architecture combines Hammerstein and Wiener systems, where the nonlinear blocks are implemented with the spline network. The algorithms used optimise the weights of the spline interpolation function and linear filter by using an adequately weighted cost function, leading to improved filter stability, steady state performance, and guaranteed convergence to globally optimal solutions. We investigate two CSAF architectures: Hammerstein–Wiener SAF (HW-SAF) and Wiener–Hammerstein SAF (WH-SAF) structures. These architectures have been designed using gradient-based approaches which are inefficient due to poor convergence speed, and produce suboptimal solutions in a Gaussian noise environment. To avert these difficulties, we estimate the design parameters of the CSAF architecture using four independent MOAs: differential evolution (DE), brainstorm optimisation (BSO), multi-verse optimiser (MVO), and a recently proposed remora optimisation algorithm (ROA). In ROA, the remora factor’s control parameters produce near-global optimal parameters with a higher convergence speed. ROA also ensures the most balanced exploration and exploitation phases compared to DE-, BSO-, and MVO-based design approaches. Finally, the identification results of three numerical and industry-specific benchmark systems, including coupled electric drives, a thermic wall, and a continuous stirred tank reactor, are presented to emphasise the effectiveness of the ROA-based CSAF design.
In passive bistatic radar, the computational efficiency of clutter suppression algorithms remains low, due to continuous increases in bandwidth for potential illuminators of opportunity and the use of multi-source detection frameworks. Accordingly, we propose a lightweight version of the extensive cancellation algorithm (ECA), which achieves clutter suppression performance comparable to that of ECA while reducing the computational and space complexities by at least one order of magnitude. This is achieved through innovative adjustments to the reference signal subspace matrix within the ECA framework, resulting in a redefined approach to the computation of the autocorrelation matrix and cross-correlation vector. This novel modification significantly simplifies the computational aspects. Furthermore, we introduce a dimension-expanding technique that streamlines clutter estimation. Overall, the proposed method replaces the computation-intensive aspects of the original ECA with fast Fourier transform (FFT) and inverse FFT operations, and eliminates the construction of the memory-intensive signal subspace. Comparing the proposed method with ECA and its batched version (ECA-B), the central advantages are more streamlined implementation and minimal storage requirements, all without compromising performance. The efficacy of this approach is demonstrated through both simulations and field experimental results.
The input impedance of the post-matching network (PMN) is configured as a complex value. The parameter solution space is determined based on the fundamental principles of the Doherty power amplifier (DPA), enabling the DPA to achieve high efficiency at the output power back-off (OBO). The parameter solution space comprises three variables: the phase parameter of the output matching network for the carrier power amplifier (carrier PA), the phase parameter of the output matching network for the peaking power amplifier (peaking PA), and the input impedance of PMN. These parameters are optimized to enable the DPA to achieve high efficiency at the OBO. In this paper, a one-to-one mapping relationship is established between the frequency and the parameter solution space, allowing for a precise optimization of the DPA across a broad frequency range. Leveraging this mapping relationship, an asymmetric DPA designed to operate over the 1.8–2.6 GHz frequency band is designed and fabricated, demonstrating the feasibility and effectiveness of the proposed approach. Under continuous wave excitation, the test results show that the drain efficiency (DE) is 42.7%–56.4% at 9.5 dB OBO and the saturated DE is 45.8%–71.1%. The saturated output power of this DPA is 46.9–48.8 dBm with a gain of 5.5–8.0 dB at saturation. A 20-MHz long-term-evolution modulated signal with a peak-to-average power ratio of 8 dB is also applied to the fabricated DPA at 1.8, 2.1, and 2.6 GHz. Under these conditions, at 8 dB OBO, the DPA shows an adjacent channel power ratio always lower than 48 dBc after digital pre-distortion linearization.
A high-linearity down mixer with outstanding robust temperature tolerance for V-band applications is proposed in this paper. The mixer’s temperature robustness has been greatly enhanced by employing a negative temperature-compensation circuit (NTC) and a positive temperature-compensation circuit (PTC) in the transconductance (gm) stage and intermediate frequency (IF) output buffer, respectively. Benefiting from the active balun with enhanced gm and emitter negative feedback technique, the linearity of the mixer has been significantly improved. For verification, a double-balanced V-band mixer is designed and implemented in a 130 nm SiGe BiCMOS process. Measured over the local oscillator (LO) bandwidth from 57 GHz to 63 GHz, the mixer demonstrates a peak conversion gain (CG) of −0.5 dB, a minimal noise figure (NF) of 11.5 dB, and an input 1 dB compression point (IP1 dB) of 4.8 dBm under an LO power of −3 dBm. Furthermore, the measurements of CG, NF, and IP1 dB exhibit commendable consistency within the temperature range of −55 ℃ to 85 ℃, with fluctuations of less than 0.8 dB, 1 dB, and 1.2 dBm, respectively. From 57 GHz to 63 GHz, the measured LO-to-radio frequency (RF) isolation is better than 46 dB, the measured return loss at the RF port is >29 dB, and at the LO port it exceeds 12 dB. With a 2.5 V supply voltage, the mixer power consumption is 15.75 mW, 18.5 mW, and 21 mW at temperatures of −55 ℃, 25 ℃, and 85 ℃, respectively. Moreover, the mixer chip occupies a total silicon area of 0.56 mm2 including all testing pads.